Commit dd97254f authored by Mark Brown's avatar Mark Brown

Merge tag 'asoc-v3.15-rc5-drivers' into asoc-linus

ASoC: Driver fixes for v3.15

A small set of driver fixes, nothing remarkable in itself or of any
relevance outside of the driver.

# gpg: Signature made Wed 14 May 2014 12:49:57 BST using RSA key ID 7EA229BD
# gpg: Good signature from "Mark Brown <broonie@sirena.org.uk>"
# gpg:                 aka "Mark Brown <broonie@debian.org>"
# gpg:                 aka "Mark Brown <broonie@kernel.org>"
# gpg:                 aka "Mark Brown <broonie@tardis.ed.ac.uk>"
# gpg:                 aka "Mark Brown <broonie@linaro.org>"
# gpg:                 aka "Mark Brown <Mark.Brown@linaro.org>"
parents 266bd275 f9a40596
...@@ -376,7 +376,7 @@ static int aic31xx_dapm_power_event(struct snd_soc_dapm_widget *w, ...@@ -376,7 +376,7 @@ static int aic31xx_dapm_power_event(struct snd_soc_dapm_widget *w,
reg = AIC31XX_ADCFLAG; reg = AIC31XX_ADCFLAG;
break; break;
default: default:
dev_err(w->codec->dev, "Unknown widget '%s' calling %s/n", dev_err(w->codec->dev, "Unknown widget '%s' calling %s\n",
w->name, __func__); w->name, __func__);
return -EINVAL; return -EINVAL;
} }
......
...@@ -154,6 +154,7 @@ static struct reg_default wm8962_reg[] = { ...@@ -154,6 +154,7 @@ static struct reg_default wm8962_reg[] = {
{ 40, 0x0000 }, /* R40 - SPKOUTL volume */ { 40, 0x0000 }, /* R40 - SPKOUTL volume */
{ 41, 0x0000 }, /* R41 - SPKOUTR volume */ { 41, 0x0000 }, /* R41 - SPKOUTR volume */
{ 49, 0x0010 }, /* R49 - Class D Control 1 */
{ 51, 0x0003 }, /* R51 - Class D Control 2 */ { 51, 0x0003 }, /* R51 - Class D Control 2 */
{ 56, 0x0506 }, /* R56 - Clocking 4 */ { 56, 0x0506 }, /* R56 - Clocking 4 */
...@@ -795,7 +796,6 @@ static bool wm8962_volatile_register(struct device *dev, unsigned int reg) ...@@ -795,7 +796,6 @@ static bool wm8962_volatile_register(struct device *dev, unsigned int reg)
case WM8962_ALC2: case WM8962_ALC2:
case WM8962_THERMAL_SHUTDOWN_STATUS: case WM8962_THERMAL_SHUTDOWN_STATUS:
case WM8962_ADDITIONAL_CONTROL_4: case WM8962_ADDITIONAL_CONTROL_4:
case WM8962_CLASS_D_CONTROL_1:
case WM8962_DC_SERVO_6: case WM8962_DC_SERVO_6:
case WM8962_INTERRUPT_STATUS_1: case WM8962_INTERRUPT_STATUS_1:
case WM8962_INTERRUPT_STATUS_2: case WM8962_INTERRUPT_STATUS_2:
...@@ -2929,13 +2929,22 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source, ...@@ -2929,13 +2929,22 @@ static int wm8962_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
static int wm8962_mute(struct snd_soc_dai *dai, int mute) static int wm8962_mute(struct snd_soc_dai *dai, int mute)
{ {
struct snd_soc_codec *codec = dai->codec; struct snd_soc_codec *codec = dai->codec;
int val; int val, ret;
if (mute) if (mute)
val = WM8962_DAC_MUTE; val = WM8962_DAC_MUTE | WM8962_DAC_MUTE_ALT;
else else
val = 0; val = 0;
/**
* The DAC mute bit is mirrored in two registers, update both to keep
* the register cache consistent.
*/
ret = snd_soc_update_bits(codec, WM8962_CLASS_D_CONTROL_1,
WM8962_DAC_MUTE_ALT, val);
if (ret < 0)
return ret;
return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1, return snd_soc_update_bits(codec, WM8962_ADC_DAC_CONTROL_1,
WM8962_DAC_MUTE, val); WM8962_DAC_MUTE, val);
} }
......
...@@ -1954,6 +1954,10 @@ ...@@ -1954,6 +1954,10 @@
#define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */ #define WM8962_SPKOUTL_ENA_MASK 0x0040 /* SPKOUTL_ENA */
#define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */ #define WM8962_SPKOUTL_ENA_SHIFT 6 /* SPKOUTL_ENA */
#define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */ #define WM8962_SPKOUTL_ENA_WIDTH 1 /* SPKOUTL_ENA */
#define WM8962_DAC_MUTE_ALT 0x0010 /* DAC_MUTE */
#define WM8962_DAC_MUTE_ALT_MASK 0x0010 /* DAC_MUTE */
#define WM8962_DAC_MUTE_ALT_SHIFT 4 /* DAC_MUTE */
#define WM8962_DAC_MUTE_ALT_WIDTH 1 /* DAC_MUTE */
#define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */ #define WM8962_SPKOUTL_PGA_MUTE 0x0002 /* SPKOUTL_PGA_MUTE */
#define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */ #define WM8962_SPKOUTL_PGA_MUTE_MASK 0x0002 /* SPKOUTL_PGA_MUTE */
#define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */ #define WM8962_SPKOUTL_PGA_MUTE_SHIFT 1 /* SPKOUTL_PGA_MUTE */
......
...@@ -258,10 +258,16 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, ...@@ -258,10 +258,16 @@ static int fsl_esai_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
return -EINVAL; return -EINVAL;
} }
if (ratio == 1) { /* Only EXTAL source can be output directly without using PSR and PM */
if (ratio == 1 && clksrc == esai_priv->extalclk) {
/* Bypass all the dividers if not being needed */ /* Bypass all the dividers if not being needed */
ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO; ecr |= tx ? ESAI_ECR_ETO : ESAI_ECR_ERO;
goto out; goto out;
} else if (ratio < 2) {
/* The ratio should be no less than 2 if using other sources */
dev_err(dai->dev, "failed to derive required HCK%c rate\n",
tx ? 'T' : 'R');
return -EINVAL;
} }
ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0); ret = fsl_esai_divisor_cal(dai, tx, ratio, false, 0);
...@@ -307,7 +313,8 @@ static int fsl_esai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq) ...@@ -307,7 +313,8 @@ static int fsl_esai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
return -EINVAL; return -EINVAL;
} }
if (esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) { /* The ratio should be contented by FP alone if bypassing PM and PSR */
if (!esai_priv->sck_div[tx] && (ratio > 16 || ratio == 0)) {
dev_err(dai->dev, "the ratio is out of range (1 ~ 16)\n"); dev_err(dai->dev, "the ratio is out of range (1 ~ 16)\n");
return -EINVAL; return -EINVAL;
} }
...@@ -454,12 +461,6 @@ static int fsl_esai_startup(struct snd_pcm_substream *substream, ...@@ -454,12 +461,6 @@ static int fsl_esai_startup(struct snd_pcm_substream *substream,
} }
if (!dai->active) { if (!dai->active) {
/* Reset Port C */
regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
/* Set synchronous mode */ /* Set synchronous mode */
regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR, regmap_update_bits(esai_priv->regmap, REG_ESAI_SAICR,
ESAI_SAICR_SYNC, esai_priv->synchronous ? ESAI_SAICR_SYNC, esai_priv->synchronous ?
...@@ -519,6 +520,11 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream, ...@@ -519,6 +520,11 @@ static int fsl_esai_hw_params(struct snd_pcm_substream *substream,
regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val); regmap_update_bits(esai_priv->regmap, REG_ESAI_xCR(tx), mask, val);
/* Remove ESAI personal reset by configuring ESAI_PCRC and ESAI_PRRC */
regmap_update_bits(esai_priv->regmap, REG_ESAI_PRRC,
ESAI_PRRC_PDC_MASK, ESAI_PRRC_PDC(ESAI_GPIO));
regmap_update_bits(esai_priv->regmap, REG_ESAI_PCRC,
ESAI_PCRC_PC_MASK, ESAI_PCRC_PC(ESAI_GPIO));
return 0; return 0;
} }
......
...@@ -145,7 +145,7 @@ static const struct file_operations audmux_debugfs_fops = { ...@@ -145,7 +145,7 @@ static const struct file_operations audmux_debugfs_fops = {
.llseek = default_llseek, .llseek = default_llseek,
}; };
static void __init audmux_debugfs_init(void) static void audmux_debugfs_init(void)
{ {
int i; int i;
char buf[20]; char buf[20];
......
...@@ -197,13 +197,12 @@ static void rsnd_dma_complete(void *data) ...@@ -197,13 +197,12 @@ static void rsnd_dma_complete(void *data)
* rsnd_dai_pointer_update() will be called twice, * rsnd_dai_pointer_update() will be called twice,
* ant it will breaks io->byte_pos * ant it will breaks io->byte_pos
*/ */
rsnd_dai_pointer_update(io, io->byte_per_period);
if (dma->submit_loop) if (dma->submit_loop)
rsnd_dma_continue(dma); rsnd_dma_continue(dma);
rsnd_unlock(priv, flags); rsnd_unlock(priv, flags);
rsnd_dai_pointer_update(io, io->byte_per_period);
} }
static void __rsnd_dma_start(struct rsnd_dma *dma) static void __rsnd_dma_start(struct rsnd_dma *dma)
......
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