drm/i915/display/adlp: Allow PSR2 to be enabled

With all the recent fixes PSR2 is properly working in Alderlake-P but
due to some issues that don't have software workarounds it will not be
supported in display steppings older than B0.

Even with this patch PSR2 will no be enabled by default in ADL-P, it
still requires enable_psr2_sel_fetch to be set to true, what some
of our tests does.

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Reviewed-by: default avatarGwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210930001409.254817-7-jose.souza@intel.com
parent 1163649a
...@@ -830,12 +830,8 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp, ...@@ -830,12 +830,8 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return false; return false;
} }
/* if (IS_ADLP_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0)) {
* We are missing the implementation of some workarounds to enabled PSR2 drm_dbg_kms(&dev_priv->drm, "PSR2 not completely functional in this stepping\n");
* in Alderlake_P, until ready PSR2 should be kept disabled.
*/
if (IS_ALDERLAKE_P(dev_priv)) {
drm_dbg_kms(&dev_priv->drm, "PSR2 is missing the implementation of workarounds\n");
return false; return false;
} }
......
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