Commit df221c96 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab

media: imx: imx7-media-csi: Merge hw_reset() with init_interface()

The imx7_csi_hw_reset() and imx7_csi_init_interface() functions are
always called together. Merge them. This allows simplifying the code by
avoiding duplicated register writes.

As the imx7_csi_hw_reset() function didn't perform a hardware reset by
initialized the registers to reset defaults (in addition to resetting
the frame counter), name the resulting function imx7_csi_init_default()
as it sets default values.
Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarRui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+huawei@kernel.org>
parent f2635a9a
...@@ -212,17 +212,6 @@ static void imx7_csi_reg_write(struct imx7_csi *csi, unsigned int value, ...@@ -212,17 +212,6 @@ static void imx7_csi_reg_write(struct imx7_csi *csi, unsigned int value,
writel(value, csi->regbase + offset); writel(value, csi->regbase + offset);
} }
static void imx7_csi_hw_reset(struct imx7_csi *csi)
{
imx7_csi_reg_write(csi,
imx7_csi_reg_read(csi, CSI_CSICR3) | BIT_FRMCNT_RST,
CSI_CSICR3);
imx7_csi_reg_write(csi, BIT_EXT_VSYNC | BIT_HSYNC_POL, CSI_CSICR1);
imx7_csi_reg_write(csi, 0, CSI_CSICR2);
imx7_csi_reg_write(csi, 0, CSI_CSICR3);
}
static u32 imx7_csi_irq_clear(struct imx7_csi *csi) static u32 imx7_csi_irq_clear(struct imx7_csi *csi)
{ {
u32 isr; u32 isr;
...@@ -233,20 +222,18 @@ static u32 imx7_csi_irq_clear(struct imx7_csi *csi) ...@@ -233,20 +222,18 @@ static u32 imx7_csi_irq_clear(struct imx7_csi *csi)
return isr; return isr;
} }
static void imx7_csi_init_interface(struct imx7_csi *csi) static void imx7_csi_init_default(struct imx7_csi *csi)
{ {
unsigned int val = 0; imx7_csi_reg_write(csi, BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE |
unsigned int imag_para; BIT_HSYNC_POL | BIT_FCC | BIT_MCLKDIV(1) |
BIT_MCLKEN, CSI_CSICR1);
val = BIT_SOF_POL | BIT_REDGE | BIT_GCLK_MODE | BIT_HSYNC_POL | imx7_csi_reg_write(csi, 0, CSI_CSICR2);
BIT_FCC | BIT_MCLKDIV(1) | BIT_MCLKEN; imx7_csi_reg_write(csi, BIT_FRMCNT_RST, CSI_CSICR3);
imx7_csi_reg_write(csi, val, CSI_CSICR1);
imag_para = BIT_IMAGE_WIDTH(800) | BIT_IMAGE_HEIGHT(600); imx7_csi_reg_write(csi, BIT_IMAGE_WIDTH(800) | BIT_IMAGE_HEIGHT(600),
imx7_csi_reg_write(csi, imag_para, CSI_CSIIMAG_PARA); CSI_CSIIMAG_PARA);
val = BIT_DMA_REFLASH_RFF; imx7_csi_reg_write(csi, BIT_DMA_REFLASH_RFF, CSI_CSICR3);
imx7_csi_reg_write(csi, val, CSI_CSICR3);
} }
static void imx7_csi_hw_enable_irq(struct imx7_csi *csi) static void imx7_csi_hw_enable_irq(struct imx7_csi *csi)
...@@ -578,8 +565,7 @@ static int imx7_csi_init(struct imx7_csi *csi) ...@@ -578,8 +565,7 @@ static int imx7_csi_init(struct imx7_csi *csi)
if (ret < 0) if (ret < 0)
return ret; return ret;
imx7_csi_hw_reset(csi); imx7_csi_init_default(csi);
imx7_csi_init_interface(csi);
imx7_csi_dmareq_rff_enable(csi); imx7_csi_dmareq_rff_enable(csi);
ret = imx7_csi_dma_setup(csi); ret = imx7_csi_dma_setup(csi);
...@@ -594,8 +580,7 @@ static int imx7_csi_init(struct imx7_csi *csi) ...@@ -594,8 +580,7 @@ static int imx7_csi_init(struct imx7_csi *csi)
static void imx7_csi_deinit(struct imx7_csi *csi) static void imx7_csi_deinit(struct imx7_csi *csi)
{ {
imx7_csi_dma_cleanup(csi); imx7_csi_dma_cleanup(csi);
imx7_csi_hw_reset(csi); imx7_csi_init_default(csi);
imx7_csi_init_interface(csi);
imx7_csi_dmareq_rff_disable(csi); imx7_csi_dmareq_rff_disable(csi);
clk_disable_unprepare(csi->mclk); clk_disable_unprepare(csi->mclk);
} }
......
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