Commit e28100bd authored by Anup Patel's avatar Anup Patel Committed by Marc Zyngier

arm64: KVM: Support X-Gene guest VCPU on APM X-Gene host

This patch allows us to have X-Gene guest VCPU when using KVM arm64
on APM X-Gene host.

We add KVM_ARM_TARGET_XGENE_POTENZA for X-Gene Potenza compatible
guest VCPU and we return KVM_ARM_TARGET_XGENE_POTENZA in kvm_target_cpu()
when running on X-Gene host with Potenza core.

[maz: sanitized the commit log]
Signed-off-by: default avatarAnup Patel <anup.patel@linaro.org>
Signed-off-by: default avatarPranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent da781470
...@@ -55,8 +55,9 @@ struct kvm_regs { ...@@ -55,8 +55,9 @@ struct kvm_regs {
#define KVM_ARM_TARGET_AEM_V8 0 #define KVM_ARM_TARGET_AEM_V8 0
#define KVM_ARM_TARGET_FOUNDATION_V8 1 #define KVM_ARM_TARGET_FOUNDATION_V8 1
#define KVM_ARM_TARGET_CORTEX_A57 2 #define KVM_ARM_TARGET_CORTEX_A57 2
#define KVM_ARM_TARGET_XGENE_POTENZA 3
#define KVM_ARM_NUM_TARGETS 3 #define KVM_ARM_NUM_TARGETS 4
/* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */ /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
#define KVM_ARM_DEVICE_TYPE_SHIFT 0 #define KVM_ARM_DEVICE_TYPE_SHIFT 0
......
...@@ -207,20 +207,26 @@ int __attribute_const__ kvm_target_cpu(void) ...@@ -207,20 +207,26 @@ int __attribute_const__ kvm_target_cpu(void)
unsigned long implementor = read_cpuid_implementor(); unsigned long implementor = read_cpuid_implementor();
unsigned long part_number = read_cpuid_part_number(); unsigned long part_number = read_cpuid_part_number();
if (implementor != ARM_CPU_IMP_ARM) switch (implementor) {
return -EINVAL; case ARM_CPU_IMP_ARM:
switch (part_number) { switch (part_number) {
case ARM_CPU_PART_AEM_V8: case ARM_CPU_PART_AEM_V8:
return KVM_ARM_TARGET_AEM_V8; return KVM_ARM_TARGET_AEM_V8;
case ARM_CPU_PART_FOUNDATION: case ARM_CPU_PART_FOUNDATION:
return KVM_ARM_TARGET_FOUNDATION_V8; return KVM_ARM_TARGET_FOUNDATION_V8;
case ARM_CPU_PART_CORTEX_A57: case ARM_CPU_PART_CORTEX_A57:
/* Currently handled by the generic backend */
return KVM_ARM_TARGET_CORTEX_A57; return KVM_ARM_TARGET_CORTEX_A57;
default: };
break;
case ARM_CPU_IMP_APM:
switch (part_number) {
case APM_CPU_PART_POTENZA:
return KVM_ARM_TARGET_XGENE_POTENZA;
};
break;
};
return -EINVAL; return -EINVAL;
}
} }
int kvm_vcpu_set_target(struct kvm_vcpu *vcpu, int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
......
...@@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void) ...@@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void)
&genericv8_target_table); &genericv8_target_table);
kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57, kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
&genericv8_target_table); &genericv8_target_table);
kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
&genericv8_target_table);
return 0; return 0;
} }
late_initcall(sys_reg_genericv8_init); late_initcall(sys_reg_genericv8_init);
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment