Commit e58e12c5 authored by Frank Li's avatar Frank Li Committed by Niklas Cassel

dt-bindings: ata: ahci-fsl-qoriq: convert to yaml format

Convert ahci-fsl-qoirq DT binding to yaml format.

Additional changes:
- Add reg-names list, ahci and sata-ecc
- Add fsl,ls1028a-ahci and fsl,lx2060a-ahci
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarNiklas Cassel <cassel@kernel.org>
parent 5433f0e7
Binding for Freescale QorIQ AHCI SATA Controller
Required properties:
- reg: Physical base address and size of the controller's register area.
- compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
- clocks: Input clock specifier. Refer to common clock bindings.
- interrupts: Interrupt specifier. Refer to interrupt binding.
Optional properties:
- dma-coherent: Enable AHCI coherent DMA operation.
- reg-names: register area names when there are more than 1 register area.
Examples:
sata@3200000 {
compatible = "fsl,ls1021a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&platform_clk 1>;
dma-coherent;
};
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ata/fsl,ahci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale QorIQ AHCI SATA Controller
maintainers:
- Frank Li <Frank.Li@nxp.com>
properties:
compatible:
enum:
- fsl,ls1021a-ahci
- fsl,ls1043a-ahci
- fsl,ls1028a-ahci
- fsl,ls1088a-ahci
- fsl,ls2080a-ahci
- fsl,lx2160a-ahci
reg:
minItems: 1
maxItems: 2
reg-names:
items:
- const: ahci
- const: sata-ecc
minItems: 1
clocks:
maxItems: 1
interrupts:
maxItems: 1
dma-coherent: true
required:
- compatible
- reg
- clocks
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
sata@3200000 {
compatible = "fsl,ls1021a-ahci";
reg = <0x3200000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&platform_clk 1>;
dma-coherent;
};
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