Commit e6f34184 authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Bjorn Andersson

soc: qcom: icc-bwmon: add per-variant quirks

BWMON v5 lacks global interrupt registers.  Other BWMON versions differ
as well, so add quirks for easier customization of code flow.

Cc: Rajendra Nayak <quic_rjendra@quicinc.com>
Cc: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: default avatarSteev Klimaszewski <steev@kali.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220728113748.170548-9-krzysztof.kozlowski@linaro.org
parent ec63dcd3
...@@ -100,6 +100,9 @@ ...@@ -100,6 +100,9 @@
#define BWMON_V4_ZONE_MAX(zone) (0x2e0 + 4 * (zone)) #define BWMON_V4_ZONE_MAX(zone) (0x2e0 + 4 * (zone))
/* Quirks for specific BWMON types */
#define BWMON_HAS_GLOBAL_IRQ BIT(0)
enum bwmon_fields { enum bwmon_fields {
F_GLOBAL_IRQ_CLEAR, F_GLOBAL_IRQ_CLEAR,
F_GLOBAL_IRQ_ENABLE, F_GLOBAL_IRQ_ENABLE,
...@@ -136,6 +139,7 @@ struct icc_bwmon_data { ...@@ -136,6 +139,7 @@ struct icc_bwmon_data {
unsigned int default_lowbw_kbps; unsigned int default_lowbw_kbps;
u8 zone1_thres_count; u8 zone1_thres_count;
u8 zone3_thres_count; u8 zone3_thres_count;
unsigned int quirks;
const struct regmap_config *regmap_cfg; const struct regmap_config *regmap_cfg;
const struct reg_field *regmap_fields; const struct reg_field *regmap_fields;
...@@ -270,6 +274,7 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon) ...@@ -270,6 +274,7 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon)
* interrupt is cleared. * interrupt is cleared.
*/ */
regmap_field_force_write(bwmon->regs[F_IRQ_CLEAR], BWMON_IRQ_ENABLE_MASK); regmap_field_force_write(bwmon->regs[F_IRQ_CLEAR], BWMON_IRQ_ENABLE_MASK);
if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ)
regmap_field_force_write(bwmon->regs[F_GLOBAL_IRQ_CLEAR], regmap_field_force_write(bwmon->regs[F_GLOBAL_IRQ_CLEAR],
BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE);
} }
...@@ -277,6 +282,7 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon) ...@@ -277,6 +282,7 @@ static void bwmon_clear_irq(struct icc_bwmon *bwmon)
static void bwmon_disable(struct icc_bwmon *bwmon) static void bwmon_disable(struct icc_bwmon *bwmon)
{ {
/* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */ /* Disable interrupts. Strict ordering, see bwmon_clear_irq(). */
if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ)
regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], 0x0); regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], 0x0);
regmap_field_write(bwmon->regs[F_IRQ_ENABLE], 0x0); regmap_field_write(bwmon->regs[F_IRQ_ENABLE], 0x0);
...@@ -290,6 +296,7 @@ static void bwmon_disable(struct icc_bwmon *bwmon) ...@@ -290,6 +296,7 @@ static void bwmon_disable(struct icc_bwmon *bwmon)
static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable) static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable)
{ {
/* Enable interrupts */ /* Enable interrupts */
if (bwmon->data->quirks & BWMON_HAS_GLOBAL_IRQ)
regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE], regmap_field_write(bwmon->regs[F_GLOBAL_IRQ_ENABLE],
BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE); BWMON_V4_GLOBAL_IRQ_ENABLE_ENABLE);
regmap_field_write(bwmon->regs[F_IRQ_ENABLE], irq_enable); regmap_field_write(bwmon->regs[F_IRQ_ENABLE], irq_enable);
...@@ -541,6 +548,7 @@ static const struct icc_bwmon_data msm8998_bwmon_data = { ...@@ -541,6 +548,7 @@ static const struct icc_bwmon_data msm8998_bwmon_data = {
.default_lowbw_kbps = 0, .default_lowbw_kbps = 0,
.zone1_thres_count = 16, .zone1_thres_count = 16,
.zone3_thres_count = 1, .zone3_thres_count = 1,
.quirks = BWMON_HAS_GLOBAL_IRQ,
.regmap_fields = msm8998_bwmon_reg_fields, .regmap_fields = msm8998_bwmon_reg_fields,
.regmap_cfg = &msm8998_bwmon_regmap_cfg, .regmap_cfg = &msm8998_bwmon_regmap_cfg,
}; };
......
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