Commit e70bd049 authored by Hersen Wu's avatar Hersen Wu Committed by Alex Deucher

drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1

when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
there is build error. struct dpm_clocks shoud not be
guarded.
Signed-off-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Reviewed-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 71a0df4b
...@@ -249,8 +249,6 @@ struct pp_smu_funcs_nv { ...@@ -249,8 +249,6 @@ struct pp_smu_funcs_nv {
}; };
#endif #endif
#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
#define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8 #define PP_SMU_NUM_SOCCLK_DPM_LEVELS 8
#define PP_SMU_NUM_DCFCLK_DPM_LEVELS 8 #define PP_SMU_NUM_DCFCLK_DPM_LEVELS 8
#define PP_SMU_NUM_FCLK_DPM_LEVELS 4 #define PP_SMU_NUM_FCLK_DPM_LEVELS 4
...@@ -288,7 +286,6 @@ struct pp_smu_funcs_rn { ...@@ -288,7 +286,6 @@ struct pp_smu_funcs_rn {
enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp, enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
struct dpm_clocks *clock_table); struct dpm_clocks *clock_table);
}; };
#endif
struct pp_smu_funcs { struct pp_smu_funcs {
struct pp_smu ctx; struct pp_smu ctx;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment