Commit e73b49eb authored by Bhadram Varka's avatar Bhadram Varka Committed by David S. Miller

stmmac: use of_property_read_u32 instead of read_u8

Numbers in DT are stored in “cells” which are 32-bits
in size. of_property_read_u8 does not work properly
because of endianness problem.

This causes it to always return 0 with little-endian
architectures.

Fix it by using of_property_read_u32() OF API.
Signed-off-by: default avatarBhadram Varka <vbhadram@nvidia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2f2b1ae2
...@@ -168,7 +168,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev, ...@@ -168,7 +168,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
} }
/* Processing RX queues common config */ /* Processing RX queues common config */
if (of_property_read_u8(rx_node, "snps,rx-queues-to-use", if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
&plat->rx_queues_to_use)) &plat->rx_queues_to_use))
plat->rx_queues_to_use = 1; plat->rx_queues_to_use = 1;
...@@ -191,7 +191,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev, ...@@ -191,7 +191,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
else else
plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB; plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
if (of_property_read_u8(q_node, "snps,map-to-dma-channel", if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
&plat->rx_queues_cfg[queue].chan)) &plat->rx_queues_cfg[queue].chan))
plat->rx_queues_cfg[queue].chan = queue; plat->rx_queues_cfg[queue].chan = queue;
/* TODO: Dynamic mapping to be included in the future */ /* TODO: Dynamic mapping to be included in the future */
...@@ -222,7 +222,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev, ...@@ -222,7 +222,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
} }
/* Processing TX queues common config */ /* Processing TX queues common config */
if (of_property_read_u8(tx_node, "snps,tx-queues-to-use", if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
&plat->tx_queues_to_use)) &plat->tx_queues_to_use))
plat->tx_queues_to_use = 1; plat->tx_queues_to_use = 1;
...@@ -244,7 +244,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev, ...@@ -244,7 +244,7 @@ static void stmmac_mtl_setup(struct platform_device *pdev,
if (queue >= plat->tx_queues_to_use) if (queue >= plat->tx_queues_to_use)
break; break;
if (of_property_read_u8(q_node, "snps,weight", if (of_property_read_u32(q_node, "snps,weight",
&plat->tx_queues_cfg[queue].weight)) &plat->tx_queues_cfg[queue].weight))
plat->tx_queues_cfg[queue].weight = 0x10 + queue; plat->tx_queues_cfg[queue].weight = 0x10 + queue;
......
...@@ -126,14 +126,14 @@ struct stmmac_axi { ...@@ -126,14 +126,14 @@ struct stmmac_axi {
struct stmmac_rxq_cfg { struct stmmac_rxq_cfg {
u8 mode_to_use; u8 mode_to_use;
u8 chan; u32 chan;
u8 pkt_route; u8 pkt_route;
bool use_prio; bool use_prio;
u32 prio; u32 prio;
}; };
struct stmmac_txq_cfg { struct stmmac_txq_cfg {
u8 weight; u32 weight;
u8 mode_to_use; u8 mode_to_use;
/* Credit Base Shaper parameters */ /* Credit Base Shaper parameters */
u32 send_slope; u32 send_slope;
...@@ -168,8 +168,8 @@ struct plat_stmmacenet_data { ...@@ -168,8 +168,8 @@ struct plat_stmmacenet_data {
int unicast_filter_entries; int unicast_filter_entries;
int tx_fifo_size; int tx_fifo_size;
int rx_fifo_size; int rx_fifo_size;
u8 rx_queues_to_use; u32 rx_queues_to_use;
u8 tx_queues_to_use; u32 tx_queues_to_use;
u8 rx_sched_algorithm; u8 rx_sched_algorithm;
u8 tx_sched_algorithm; u8 tx_sched_algorithm;
struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES]; struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];
......
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