arm64: dts: qcom: sdm630: order clocks according to bindings

The CAMSS DTSI device node, which came after the bindings were merged,
got the clocks ordered differently then specified in the bindings:

  sdm636-sony-xperia-ganges-mermaid.dtb: camss@ca00000: reg-names:4: 'csid3' was expected

Reordering them to match bindings should not cause ABI issues, because
the driver relies on names, not ordering.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220509144714.144154-2-krzysztof.kozlowski@linaro.org

arch/arm64/boot/dts/qcom/sdm630.dtsi

@@ -1894,12 +1894,11 @@ camss: camss@ca00000 {
 					  "ispif",
 					  "vfe0",
 					  "vfe1";
-			clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
-				<&mmcc THROTTLE_CAMSS_AXI_CLK>,
-				<&mmcc CAMSS_ISPIF_AHB_CLK>,
-				<&mmcc CAMSS_CSI0PHYTIMER_CLK>,
-				<&mmcc CAMSS_CSI1PHYTIMER_CLK>,
-				<&mmcc CAMSS_CSI2PHYTIMER_CLK>,
+			clocks = <&mmcc CAMSS_AHB_CLK>,
+				 <&mmcc CAMSS_CPHY_CSID0_CLK>,
+				 <&mmcc CAMSS_CPHY_CSID1_CLK>,
+				 <&mmcc CAMSS_CPHY_CSID2_CLK>,
+				 <&mmcc CAMSS_CPHY_CSID3_CLK>,
 				 <&mmcc CAMSS_CSI0_AHB_CLK>,
 				 <&mmcc CAMSS_CSI0_CLK>,
 				 <&mmcc CAMSS_CPHY_CSID0_CLK>,
@@ -1920,28 +1919,28 @@ camss: camss@ca00000 {
 				 <&mmcc CAMSS_CPHY_CSID3_CLK>,
 				 <&mmcc CAMSS_CSI3PIX_CLK>,
 				 <&mmcc CAMSS_CSI3RDI_CLK>,
-				<&mmcc CAMSS_AHB_CLK>,
-				<&mmcc CAMSS_VFE0_CLK>,
+				 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
+				 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
+				 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
+				 <&mmcc CSIPHY_AHB2CRIF_CLK>,
 				 <&mmcc CAMSS_CSI_VFE0_CLK>,
+				 <&mmcc CAMSS_CSI_VFE1_CLK>,
+				 <&mmcc CAMSS_ISPIF_AHB_CLK>,
+				 <&mmcc THROTTLE_CAMSS_AXI_CLK>,
+				 <&mmcc CAMSS_TOP_AHB_CLK>,
 				 <&mmcc CAMSS_VFE0_AHB_CLK>,
+				 <&mmcc CAMSS_VFE0_CLK>,
 				 <&mmcc CAMSS_VFE0_STREAM_CLK>,
-				<&mmcc CAMSS_VFE1_CLK>,
-				<&mmcc CAMSS_CSI_VFE1_CLK>,
 				 <&mmcc CAMSS_VFE1_AHB_CLK>,
+				 <&mmcc CAMSS_VFE1_CLK>,
 				 <&mmcc CAMSS_VFE1_STREAM_CLK>,
 				 <&mmcc CAMSS_VFE_VBIF_AHB_CLK>,
-				<&mmcc CAMSS_VFE_VBIF_AXI_CLK>,
-				<&mmcc CSIPHY_AHB2CRIF_CLK>,
-				<&mmcc CAMSS_CPHY_CSID0_CLK>,
-				<&mmcc CAMSS_CPHY_CSID1_CLK>,
-				<&mmcc CAMSS_CPHY_CSID2_CLK>,
-				<&mmcc CAMSS_CPHY_CSID3_CLK>;
-			clock-names = "top_ahb",
-				"throttle_axi",
-				"ispif_ahb",
-				"csiphy0_timer",
-				"csiphy1_timer",
-				"csiphy2_timer",
+				 <&mmcc CAMSS_VFE_VBIF_AXI_CLK>;
+			clock-names = "ahb",
+				      "cphy_csid0",
+				      "cphy_csid1",
+				      "cphy_csid2",
+				      "cphy_csid3",
 				      "csi0_ahb",
 				      "csi0",
 				      "csi0_phy",
@@ -1962,22 +1961,23 @@ camss: camss@ca00000 {
 				      "csi3_phy",
 				      "csi3_pix",
 				      "csi3_rdi",
-				"ahb",
-				"vfe0",
+				      "csiphy0_timer",
+				      "csiphy1_timer",
+				      "csiphy2_timer",
+				      "csiphy_ahb2crif",
 				      "csi_vfe0",
+				      "csi_vfe1",
+				      "ispif_ahb",
+				      "throttle_axi",
+				      "top_ahb",
 				      "vfe0_ahb",
+				      "vfe0",
 				      "vfe0_stream",
-				"vfe1",
-				"csi_vfe1",
 				      "vfe1_ahb",
+				      "vfe1",
 				      "vfe1_stream",
 				      "vfe_ahb",
-				"vfe_axi",
-				"csiphy_ahb2crif",
-				"cphy_csid0",
-				"cphy_csid1",
-				"cphy_csid2",
-				"cphy_csid3";
+				      "vfe_axi";
 			interconnects = <&mnoc 5 &bimc 5>;
 			interconnect-names = "vfe-mem";
 			iommus = <&mmss_smmu 0xc00>,