Commit e9a66851 authored by Michael Walle's avatar Michael Walle Committed by David S. Miller

net: phy: bcm54140: apply the workaround on b0 chips

The lower three bits of the phy_id specifies the chip stepping. The
workaround is specifically for the B0 stepping. Apply it only on these
chips.
Signed-off-by: default avatarMichael Walle <michael@walle.cc>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Reviewed-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent afcecca5
......@@ -115,6 +115,9 @@
#define BCM54140_HWMON_IN_ALARM_BIT(ch) ((ch) ? BCM54140_RDB_MON_ISR_3V3 \
: BCM54140_RDB_MON_ISR_1V0)
#define BCM54140_PHY_ID_REV(phy_id) ((phy_id) & 0x7)
#define BCM54140_REV_B0 1
#define BCM54140_DEFAULT_DOWNSHIFT 5
#define BCM54140_MAX_DOWNSHIFT 9
......@@ -632,9 +635,11 @@ static int bcm54140_config_init(struct phy_device *phydev)
int ret;
/* Apply hardware errata */
if (BCM54140_PHY_ID_REV(phydev->phy_id) == BCM54140_REV_B0) {
ret = bcm54140_b0_workaround(phydev);
if (ret)
return ret;
}
/* Unmask events we are interested in. */
reg &= ~(BCM54140_RDB_INT_DUPLEX |
......
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