Commit eb788f43 authored by Santosh Shilimkar's avatar Santosh Shilimkar

ARM: Keystone: Convert device tree file to use IRQ defines

Use the GIC and standard IRQ binding defines in all IRQ specifiers.
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 226d1c5b
...@@ -7,6 +7,8 @@ ...@@ -7,6 +7,8 @@
*/ */
/dts-v1/; /dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi" #include "skeleton.dtsi"
/ { / {
...@@ -67,18 +69,23 @@ gic: interrupt-controller { ...@@ -67,18 +69,23 @@ gic: interrupt-controller {
timer { timer {
compatible = "arm,armv7-timer"; compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>, interrupts =
<1 14 0xf08>, <GIC_PPI 13
<1 11 0xf08>, (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<1 10 0x308>; <GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
}; };
pmu { pmu {
compatible = "arm,cortex-a15-pmu"; compatible = "arm,cortex-a15-pmu";
interrupts = <0 20 0xf01>, interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
<0 21 0xf01>, <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<0 22 0xf01>, <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
<0 23 0xf01>; <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
}; };
soc { soc {
...@@ -100,7 +107,7 @@ uart0: serial@02530c00 { ...@@ -100,7 +107,7 @@ uart0: serial@02530c00 {
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02530c00 0x100>; reg = <0x02530c00 0x100>;
clock-frequency = <133120000>; clock-frequency = <133120000>;
interrupts = <0 277 0xf01>; interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
}; };
uart1: serial@02531000 { uart1: serial@02531000 {
...@@ -110,7 +117,7 @@ uart1: serial@02531000 { ...@@ -110,7 +117,7 @@ uart1: serial@02531000 {
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02531000 0x100>; reg = <0x02531000 0x100>;
clock-frequency = <133120000>; clock-frequency = <133120000>;
interrupts = <0 280 0xf01>; interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
}; };
}; };
......
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