Commit ec1e91d4 authored by Frieder Schrempf's avatar Frieder Schrempf Committed by Shawn Guo

arm64: dts: imx8mm-kontron: Add support for ultra high speed modes on SD card

In order to use ultra high speed modes (UHS) on the SD card slot, we
add matching pinctrls and fix the voltage switching for LDO5 of the
PMIC, by providing the SD_VSEL pin as GPIO to the PMIC driver.
Signed-off-by: default avatarFrieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 79730092
...@@ -189,8 +189,10 @@ usbnet: usbether@1 { ...@@ -189,8 +189,10 @@ usbnet: usbether@1 {
}; };
&usdhc2 { &usdhc2 {
pinctrl-names = "default"; pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>; pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
vmmc-supply = <&reg_vdd_3v3>; vmmc-supply = <&reg_vdd_3v3>;
vqmmc-supply = <&reg_nvcc_sd>; vqmmc-supply = <&reg_nvcc_sd>;
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
...@@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 ...@@ -319,4 +321,28 @@ MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>; >;
}; };
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>;
};
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019
>;
};
}; };
...@@ -86,6 +86,7 @@ pca9450: pmic@25 { ...@@ -86,6 +86,7 @@ pca9450: pmic@25 {
pinctrl-0 = <&pinctrl_pmic>; pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio1>; interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
regulators { regulators {
reg_vdd_soc: BUCK1 { reg_vdd_soc: BUCK1 {
...@@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 ...@@ -225,6 +226,7 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
pinctrl_pmic: pmicgrp { pinctrl_pmic: pmicgrp {
fsl,pins = < fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141 MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x141
MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x141
>; >;
}; };
......
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