Commit ec2adcd8 authored by Michael Ellerman's avatar Michael Ellerman

powerpc: Add some documentation of ISA versions

Add some documentation on which CPU versions map to which ISA
versions. This is all publicly available information, some of it
already in the kernel source, but it's much nicer to have it all in
one place.
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 2b874a5c
CPU to ISA Version Mapping
==========================
Mapping of some CPU versions to relevant ISA versions.
========= ====================
CPU Architecture version
========= ====================
Power9 Power ISA v3.0B
Power8 Power ISA v2.07
Power7 Power ISA v2.06
Power6 Power ISA v2.05
PA6T Power ISA v2.04
Cell PPU - Power ISA v2.02 with some minor exceptions
- Plus Altivec/VMX ~= 2.03
Power5++ Power ISA v2.04 (no VMX)
Power5+ Power ISA v2.03
Power5 - PowerPC User Instruction Set Architecture Book I v2.02
- PowerPC Virtual Environment Architecture Book II v2.02
- PowerPC Operating Environment Architecture Book III v2.02
PPC970 - PowerPC User Instruction Set Architecture Book I v2.01
- PowerPC Virtual Environment Architecture Book II v2.01
- PowerPC Operating Environment Architecture Book III v2.01
- Plus Altivec/VMX ~= 2.03
========= ====================
Key Features
------------
========== ==================
CPU VMX (aka. Altivec)
========== ==================
Power9 Yes
Power8 Yes
Power7 Yes
Power6 Yes
PA6T Yes
Cell PPU Yes
Power5++ No
Power5+ No
Power5 No
PPC970 Yes
========== ==================
========== ====
CPU VSX
========== ====
Power9 Yes
Power8 Yes
Power7 Yes
Power6 No
PA6T No
Cell PPU No
Power5++ No
Power5+ No
Power5 No
PPC970 No
========== ====
========== ====================
CPU Transactional Memory
========== ====================
Power9 Yes (* see transactional_memory.txt)
Power8 Yes
Power7 No
Power6 No
PA6T No
Cell PPU No
Power5++ No
Power5+ No
Power5 No
PPC970 No
========== ====================
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