Commit ef9e1b9b authored by Jayamohan Kallickal's avatar Jayamohan Kallickal Committed by James Bottomley

[SCSI] be2iscsi: Fix support for DEFQ extension

Fix support for DEFQ extension which will be used by latest
adapters
Signed-off-by: default avatarJohn Soni Jose <sony.john-n@emulex.com>
Signed-off-by: default avatarJayamohan Kallickal <jayamohan.kallickal@emulex.com>
Reviewed-by: default avatarMike Christie <michaelc@cs.wisc.edu>
Signed-off-by: default avatarJames Bottomley <JBottomley@Parallels.com>
parent 2c9dfd36
...@@ -1021,6 +1021,7 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, ...@@ -1021,6 +1021,7 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem); struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
struct be_defq_create_req *req = embedded_payload(wrb); struct be_defq_create_req *req = embedded_payload(wrb);
struct be_dma_mem *q_mem = &dq->dma_mem; struct be_dma_mem *q_mem = &dq->dma_mem;
struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
void *ctxt = &req->context; void *ctxt = &req->context;
int status; int status;
...@@ -1033,17 +1034,36 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, ...@@ -1033,17 +1034,36 @@ int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req)); OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req));
req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid, ctxt, 0);
AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid_valid, ctxt, if (is_chip_be2_be3r(phba)) {
1); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, pci_func_id, ctxt, rx_pdid, ctxt, 0);
PCI_FUNC(ctrl->pdev->devfn)); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, ring_size, ctxt, rx_pdid_valid, ctxt, 1);
be_encoded_q_len(length / sizeof(struct phys_addr))); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, default_buffer_size, pci_func_id, ctxt, PCI_FUNC(ctrl->pdev->devfn));
ctxt, entry_size); AMAP_SET_BITS(struct amap_be_default_pdu_context,
AMAP_SET_BITS(struct amap_be_default_pdu_context, cq_id_recv, ctxt, ring_size, ctxt,
cq->id); be_encoded_q_len(length /
sizeof(struct phys_addr)));
AMAP_SET_BITS(struct amap_be_default_pdu_context,
default_buffer_size, ctxt, entry_size);
AMAP_SET_BITS(struct amap_be_default_pdu_context,
cq_id_recv, ctxt, cq->id);
} else {
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
rx_pdid, ctxt, 0);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
rx_pdid_valid, ctxt, 1);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
ring_size, ctxt,
be_encoded_q_len(length /
sizeof(struct phys_addr)));
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
default_buffer_size, ctxt, entry_size);
AMAP_SET_BITS(struct amap_default_pdu_context_ext,
cq_id_recv, ctxt, cq->id);
}
be_dws_cpu_to_le(ctxt, sizeof(req->context)); be_dws_cpu_to_le(ctxt, sizeof(req->context));
......
...@@ -756,6 +756,18 @@ struct amap_be_default_pdu_context { ...@@ -756,6 +756,18 @@ struct amap_be_default_pdu_context {
u8 rsvd4[32]; /* dword 3 */ u8 rsvd4[32]; /* dword 3 */
} __packed; } __packed;
struct amap_default_pdu_context_ext {
u8 rsvd0[16]; /* dword 0 */
u8 ring_size[4]; /* dword 0 */
u8 rsvd1[12]; /* dword 0 */
u8 rsvd2[22]; /* dword 1 */
u8 rx_pdid[9]; /* dword 1 */
u8 rx_pdid_valid; /* dword 1 */
u8 default_buffer_size[16]; /* dword 2 */
u8 cq_id_recv[16]; /* dword 2 */
u8 rsvd3[32]; /* dword 3 */
} __packed;
struct be_defq_create_req { struct be_defq_create_req {
struct be_cmd_req_hdr hdr; struct be_cmd_req_hdr hdr;
u16 num_pages; u16 num_pages;
...@@ -901,7 +913,7 @@ struct amap_it_dmsg_cqe_v2 { ...@@ -901,7 +913,7 @@ struct amap_it_dmsg_cqe_v2 {
* stack to notify the * stack to notify the
* controller of a posted Work Request Block * controller of a posted Work Request Block
*/ */
#define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */ #define DB_WRB_POST_CID_MASK 0xFFFF /* bits 0 - 16 */
#define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */ #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */
#define DB_DEF_PDU_WRB_INDEX_SHIFT 16 #define DB_DEF_PDU_WRB_INDEX_SHIFT 16
......
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