Commit f0148711 authored by Andreas Herrmann's avatar Andreas Herrmann Committed by H. Peter Anvin

x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs

If host CPU is exposed to a guest the OSVW MSRs are not guaranteed
to be present and a GP fault occurs. Thus checking the feature flag is
essential.

Cc: <stable@kernel.org> # .32.x .33.x
Signed-off-by: default avatarAndreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100427101348.GC4489@alberich.amd.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent b0c4d952
...@@ -546,12 +546,14 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c) ...@@ -546,12 +546,14 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
* check OSVW bit for CPUs that are not affected * check OSVW bit for CPUs that are not affected
* by erratum #400 * by erratum #400
*/ */
if (cpu_has(c, X86_FEATURE_OSVW)) {
rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val); rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
if (val >= 2) { if (val >= 2) {
rdmsrl(MSR_AMD64_OSVW_STATUS, val); rdmsrl(MSR_AMD64_OSVW_STATUS, val);
if (!(val & BIT(1))) if (!(val & BIT(1)))
goto no_c1e_idle; goto no_c1e_idle;
} }
}
return 1; return 1;
} }
......
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