Commit f23dbe18 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'irq-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A set of interrupt chip driver fixes:

   - Ensure the atomicity of affinity updates in the GIC driver

   - Don't try to sleep in atomic context when waiting for the GICv4.1
     to respond. Use polling instead.

   - Typo fixes in Kconfig and warnings"

* tag 'irq-urgent-2020-07-05' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/gic: Atomically update affinity
  irqchip/riscv-intc: Fix a typo in a pr_warn()
  irqchip/gic-v4.1: Use readx_poll_timeout_atomic() to fix sleep in atomic
  irqchip/loongson-pci-msi: Fix a typo in Kconfig
parents 5465a324 98817a84
...@@ -563,7 +563,7 @@ config LOONGSON_PCH_PIC ...@@ -563,7 +563,7 @@ config LOONGSON_PCH_PIC
Support for the Loongson PCH PIC Controller. Support for the Loongson PCH PIC Controller.
config LOONGSON_PCH_MSI config LOONGSON_PCH_MSI
bool "Loongson PCH PIC Controller" bool "Loongson PCH MSI Controller"
depends on MACH_LOONGSON64 || COMPILE_TEST depends on MACH_LOONGSON64 || COMPILE_TEST
depends on PCI depends on PCI
default MACH_LOONGSON64 default MACH_LOONGSON64
......
...@@ -3797,7 +3797,7 @@ static void its_wait_vpt_parse_complete(void) ...@@ -3797,7 +3797,7 @@ static void its_wait_vpt_parse_complete(void)
if (!gic_rdists->has_vpend_valid_dirty) if (!gic_rdists->has_vpend_valid_dirty)
return; return;
WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER, WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER,
val, val,
!(val & GICR_VPENDBASER_Dirty), !(val & GICR_VPENDBASER_Dirty),
10, 500)); 10, 500));
......
...@@ -329,10 +329,8 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) ...@@ -329,10 +329,8 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
bool force) bool force)
{ {
void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d);
unsigned int cpu, shift = (gic_irq(d) % 4) * 8; unsigned int cpu;
u32 val, mask, bit;
unsigned long flags;
if (!force) if (!force)
cpu = cpumask_any_and(mask_val, cpu_online_mask); cpu = cpumask_any_and(mask_val, cpu_online_mask);
...@@ -342,13 +340,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, ...@@ -342,13 +340,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
return -EINVAL; return -EINVAL;
gic_lock_irqsave(flags); writeb_relaxed(gic_cpu_map[cpu], reg);
mask = 0xff << shift;
bit = gic_cpu_map[cpu] << shift;
val = readl_relaxed(reg) & ~mask;
writel_relaxed(val | bit, reg);
gic_unlock_irqrestore(flags);
irq_data_update_effective_affinity(d, cpumask_of(cpu)); irq_data_update_effective_affinity(d, cpumask_of(cpu));
return IRQ_SET_MASK_OK_DONE; return IRQ_SET_MASK_OK_DONE;
......
...@@ -99,7 +99,7 @@ static int __init riscv_intc_init(struct device_node *node, ...@@ -99,7 +99,7 @@ static int __init riscv_intc_init(struct device_node *node,
hartid = riscv_of_parent_hartid(node); hartid = riscv_of_parent_hartid(node);
if (hartid < 0) { if (hartid < 0) {
pr_warn("unable to fine hart id for %pOF\n", node); pr_warn("unable to find hart id for %pOF\n", node);
return 0; return 0;
} }
......
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