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Commit f327d43d authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper
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ARM: mvebu: use GIC_{SPI,PPI} in Armada 375/38x DTs 

Instead of hardcoding 0 and 1 to indicate SPI and PPI GIC interrupts,
use the definitions of <dt-bindings/interrupt-controller/arm-gic.h> to
clarify the Device Tree code.
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent a2be1561
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Showing with 55 additions and 53 deletions
arch/arm/boot/dts/armada-375.dtsi
View file @ f327d43d
...@@ -12,6 +12,7 @@ ...@@ -12,6 +12,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
...@@ -129,7 +130,7 @@ L2: cache-controller@8000 { ...@@ -129,7 +130,7 @@ L2: cache-controller@8000 {
timer@c600 { timer@c600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0xc600 0x20>; reg = <0xc600 0x20>;
interrupts = <1 13 0x301>; interrupts = <GIC_PPI 13 0x301>;
clocks = <&coreclk 2>; clocks = <&coreclk 2>;
}; };
...@@ -148,7 +149,7 @@ spi0: spi@10600 { ...@@ -148,7 +149,7 @@ spi0: spi@10600 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <0>; cell-index = <0>;
interrupts = <0 1 0x4>; interrupts = <GIC_SPI 1 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -159,7 +160,7 @@ spi1: spi@10680 { ...@@ -159,7 +160,7 @@ spi1: spi@10680 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <1>; cell-index = <1>;
interrupts = <0 63 0x4>; interrupts = <GIC_SPI 63 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -169,7 +170,7 @@ i2c0: i2c@11000 { ...@@ -169,7 +170,7 @@ i2c0: i2c@11000 {
reg = <0x11000 0x20>; reg = <0x11000 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 2 0x4>; interrupts = <GIC_SPI 2 0x4>;
timeout-ms = <1000>; timeout-ms = <1000>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
...@@ -180,7 +181,7 @@ i2c1: i2c@11100 { ...@@ -180,7 +181,7 @@ i2c1: i2c@11100 {
reg = <0x11100 0x20>; reg = <0x11100 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 3 0x4>; interrupts = <GIC_SPI 3 0x4>;
timeout-ms = <1000>; timeout-ms = <1000>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
...@@ -190,7 +191,7 @@ serial@12000 { ...@@ -190,7 +191,7 @@ serial@12000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>; reg = <0x12000 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <0 12 4>; interrupts = <GIC_SPI 12 4>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
...@@ -199,7 +200,7 @@ serial@12100 { ...@@ -199,7 +200,7 @@ serial@12100 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x12100 0x100>; reg = <0x12100 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <0 13 4>; interrupts = <GIC_SPI 13 4>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
...@@ -248,8 +249,8 @@ gpio0: gpio@18100 { ...@@ -248,8 +249,8 @@ gpio0: gpio@18100 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 53 0x4>, <0 54 0x4>, interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>,
<0 55 0x4>, <0 56 0x4>; <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>;
}; };
gpio1: gpio@18140 { gpio1: gpio@18140 {
...@@ -260,8 +261,8 @@ gpio1: gpio@18140 { ...@@ -260,8 +261,8 @@ gpio1: gpio@18140 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 58 0x4>, <0 59 0x4>, interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>,
<0 60 0x4>, <0 61 0x4>; <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>;
}; };
gpio2: gpio@18180 { gpio2: gpio@18180 {
...@@ -272,7 +273,7 @@ gpio2: gpio@18180 { ...@@ -272,7 +273,7 @@ gpio2: gpio@18180 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 62 0x4>; interrupts = <GIC_SPI 62 0x4>;
}; };
system-controller@18200 { system-controller@18200 {
...@@ -299,16 +300,16 @@ mpic: interrupt-controller@20000 { ...@@ -299,16 +300,16 @@ mpic: interrupt-controller@20000 {
#size-cells = <1>; #size-cells = <1>;
interrupt-controller; interrupt-controller;
msi-controller; msi-controller;
interrupts = <1 15 0x4>; interrupts = <GIC_PPI 15 0x4>;
}; };
timer@20300 { timer@20300 {
compatible = "marvell,armada-375-timer", "marvell,armada-370-timer"; compatible = "marvell,armada-375-timer", "marvell,armada-370-timer";
reg = <0x20300 0x30>, <0x21040 0x30>; reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts-extended = <&gic 0 8 4>, interrupts-extended = <&gic GIC_SPI 8 4>,
<&gic 0 9 4>, <&gic GIC_SPI 9 4>,
<&gic 0 10 4>, <&gic GIC_SPI 10 4>,
<&gic 0 11 4>, <&gic GIC_SPI 11 4>,
<&mpic 5>, <&mpic 5>,
<&mpic 6>; <&mpic 6>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
...@@ -322,12 +323,12 @@ xor@60800 { ...@@ -322,12 +323,12 @@ xor@60800 {
status = "okay"; status = "okay";
xor00 { xor00 {
interrupts = <0 22 0x4>; interrupts = <GIC_SPI 22 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
}; };
xor01 { xor01 {
interrupts = <0 23 0x4>; interrupts = <GIC_SPI 23 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
dmacap,memset; dmacap,memset;
...@@ -342,12 +343,12 @@ xor@60900 { ...@@ -342,12 +343,12 @@ xor@60900 {
status = "okay"; status = "okay";
xor10 { xor10 {
interrupts = <0 65 0x4>; interrupts = <GIC_SPI 65 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
}; };
xor11 { xor11 {
interrupts = <0 66 0x4>; interrupts = <GIC_SPI 66 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
dmacap,memset; dmacap,memset;
...@@ -357,7 +358,7 @@ xor11 { ...@@ -357,7 +358,7 @@ xor11 {
sata@a0000 { sata@a0000 {
compatible = "marvell,orion-sata"; compatible = "marvell,orion-sata";
reg = <0xa0000 0x5000>; reg = <0xa0000 0x5000>;
interrupts = <0 26 0x4>; interrupts = <GIC_SPI 26 0x4>;
clocks = <&gateclk 14>, <&gateclk 20>; clocks = <&gateclk 14>, <&gateclk 20>;
clock-names = "0", "1"; clock-names = "0", "1";
status = "disabled"; status = "disabled";
...@@ -368,7 +369,7 @@ nand@d0000 { ...@@ -368,7 +369,7 @@ nand@d0000 {
reg = <0xd0000 0x54>; reg = <0xd0000 0x54>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
interrupts = <0 84 0x4>; interrupts = <GIC_SPI 84 0x4>;
clocks = <&gateclk 11>; clocks = <&gateclk 11>;
status = "disabled"; status = "disabled";
}; };
...@@ -376,7 +377,7 @@ nand@d0000 { ...@@ -376,7 +377,7 @@ nand@d0000 {
mvsdio@d4000 { mvsdio@d4000 {
compatible = "marvell,orion-sdio"; compatible = "marvell,orion-sdio";
reg = <0xd4000 0x200>; reg = <0xd4000 0x200>;
interrupts = <0 25 0x4>; interrupts = <GIC_SPI 25 0x4>;
clocks = <&gateclk 17>; clocks = <&gateclk 17>;
bus-width = <4>; bus-width = <4>;
cap-sdio-irq; cap-sdio-irq;
...@@ -429,7 +430,7 @@ pcie@1,0 { ...@@ -429,7 +430,7 @@ pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 29 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
...@@ -446,7 +447,7 @@ pcie@2,0 { ...@@ -446,7 +447,7 @@ pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 33 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
......
arch/arm/boot/dts/armada-380.dtsi
View file @ f327d43d
...@@ -70,7 +70,7 @@ pcie@1,0 { ...@@ -70,7 +70,7 @@ pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 29 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
...@@ -88,7 +88,7 @@ pcie@2,0 { ...@@ -88,7 +88,7 @@ pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 33 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
...@@ -106,7 +106,7 @@ pcie@3,0 { ...@@ -106,7 +106,7 @@ pcie@3,0 {
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 70 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
......
arch/arm/boot/dts/armada-385.dtsi
View file @ f327d43d
...@@ -81,7 +81,7 @@ pcie@1,0 { ...@@ -81,7 +81,7 @@ pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 29 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 29 0x4>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
...@@ -99,7 +99,7 @@ pcie@2,0 { ...@@ -99,7 +99,7 @@ pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 33 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 33 0x4>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
...@@ -117,7 +117,7 @@ pcie@3,0 { ...@@ -117,7 +117,7 @@ pcie@3,0 {
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 70 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 70 0x4>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
...@@ -138,7 +138,7 @@ pcie@4,0 { ...@@ -138,7 +138,7 @@ pcie@4,0 {
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>; 0x81000000 0 0 0x81000000 0x4 0 1 0>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic 0 71 0x4>; interrupt-map = <0 0 0 0 &gic GIC_SPI 71 0x4>;
marvell,pcie-port = <3>; marvell,pcie-port = <3>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 7>; clocks = <&gateclk 7>;
......
arch/arm/boot/dts/armada-38x.dtsi
View file @ f327d43d
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
*/ */
#include "skeleton.dtsi" #include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16)) #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
...@@ -109,7 +110,7 @@ L2: cache-controller@8000 { ...@@ -109,7 +110,7 @@ L2: cache-controller@8000 {
timer@c600 { timer@c600 {
compatible = "arm,cortex-a9-twd-timer"; compatible = "arm,cortex-a9-twd-timer";
reg = <0xc600 0x20>; reg = <0xc600 0x20>;
interrupts = <1 13 0x301>; interrupts = <GIC_PPI 13 0x301>;
clocks = <&coreclk 2>; clocks = <&coreclk 2>;
}; };
...@@ -128,7 +129,7 @@ spi0: spi@10600 { ...@@ -128,7 +129,7 @@ spi0: spi@10600 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <0>; cell-index = <0>;
interrupts = <0 1 0x4>; interrupts = <GIC_SPI 1 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -139,7 +140,7 @@ spi1: spi@10680 { ...@@ -139,7 +140,7 @@ spi1: spi@10680 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cell-index = <1>; cell-index = <1>;
interrupts = <0 63 0x4>; interrupts = <GIC_SPI 63 0x4>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
}; };
...@@ -149,7 +150,7 @@ i2c0: i2c@11000 { ...@@ -149,7 +150,7 @@ i2c0: i2c@11000 {
reg = <0x11000 0x20>; reg = <0x11000 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 2 0x4>; interrupts = <GIC_SPI 2 0x4>;
timeout-ms = <1000>; timeout-ms = <1000>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
...@@ -160,7 +161,7 @@ i2c1: i2c@11100 { ...@@ -160,7 +161,7 @@ i2c1: i2c@11100 {
reg = <0x11100 0x20>; reg = <0x11100 0x20>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
interrupts = <0 3 0x4>; interrupts = <GIC_SPI 3 0x4>;
timeout-ms = <1000>; timeout-ms = <1000>;
clocks = <&coreclk 0>; clocks = <&coreclk 0>;
status = "disabled"; status = "disabled";
...@@ -170,7 +171,7 @@ serial@12000 { ...@@ -170,7 +171,7 @@ serial@12000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x12000 0x100>; reg = <0x12000 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <0 12 4>; interrupts = <GIC_SPI 12 4>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
...@@ -179,7 +180,7 @@ serial@12100 { ...@@ -179,7 +180,7 @@ serial@12100 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x12100 0x100>; reg = <0x12100 0x100>;
reg-shift = <2>; reg-shift = <2>;
interrupts = <0 13 4>; interrupts = <GIC_SPI 13 4>;
reg-io-width = <1>; reg-io-width = <1>;
status = "disabled"; status = "disabled";
}; };
...@@ -197,8 +198,8 @@ gpio0: gpio@18100 { ...@@ -197,8 +198,8 @@ gpio0: gpio@18100 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 53 0x4>, <0 54 0x4>, interrupts = <GIC_SPI 53 0x4>, <GIC_SPI 54 0x4>,
<0 55 0x4>, <0 56 0x4>; <GIC_SPI 55 0x4>, <GIC_SPI 56 0x4>;
}; };
gpio1: gpio@18140 { gpio1: gpio@18140 {
...@@ -209,8 +210,8 @@ gpio1: gpio@18140 { ...@@ -209,8 +210,8 @@ gpio1: gpio@18140 {
#gpio-cells = <2>; #gpio-cells = <2>;
interrupt-controller; interrupt-controller;
#interrupt-cells = <2>; #interrupt-cells = <2>;
interrupts = <0 58 0x4>, <0 59 0x4>, interrupts = <GIC_SPI 58 0x4>, <GIC_SPI 59 0x4>,
<0 60 0x4>, <0 61 0x4>; <GIC_SPI 60 0x4>, <GIC_SPI 61 0x4>;
}; };
system-controller@18200 { system-controller@18200 {
...@@ -244,17 +245,17 @@ mpic: interrupt-controller@20000 { ...@@ -244,17 +245,17 @@ mpic: interrupt-controller@20000 {
#size-cells = <1>; #size-cells = <1>;
interrupt-controller; interrupt-controller;
msi-controller; msi-controller;
interrupts = <1 15 0x4>; interrupts = <GIC_PPI 15 0x4>;
}; };
timer@20300 { timer@20300 {
compatible = "marvell,armada-380-timer", compatible = "marvell,armada-380-timer",
"marvell,armada-xp-timer"; "marvell,armada-xp-timer";
reg = <0x20300 0x30>, <0x21040 0x30>; reg = <0x20300 0x30>, <0x21040 0x30>;
interrupts-extended = <&gic 0 8 4>, interrupts-extended = <&gic GIC_SPI 8 4>,
<&gic 0 9 4>, <&gic GIC_SPI 9 4>,
<&gic 0 10 4>, <&gic GIC_SPI 10 4>,
<&gic 0 11 4>, <&gic GIC_SPI 11 4>,
<&mpic 5>, <&mpic 5>,
<&mpic 6>; <&mpic 6>;
clocks = <&coreclk 2>, <&refclk>; clocks = <&coreclk 2>, <&refclk>;
...@@ -285,12 +286,12 @@ xor@60800 { ...@@ -285,12 +286,12 @@ xor@60800 {
status = "okay"; status = "okay";
xor00 { xor00 {
interrupts = <0 22 0x4>; interrupts = <GIC_SPI 22 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
}; };
xor01 { xor01 {
interrupts = <0 23 0x4>; interrupts = <GIC_SPI 23 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
dmacap,memset; dmacap,memset;
...@@ -305,12 +306,12 @@ xor@60900 { ...@@ -305,12 +306,12 @@ xor@60900 {
status = "okay"; status = "okay";
xor10 { xor10 {
interrupts = <0 65 0x4>; interrupts = <GIC_SPI 65 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
}; };
xor11 { xor11 {
interrupts = <0 66 0x4>; interrupts = <GIC_SPI 66 0x4>;
dmacap,memcpy; dmacap,memcpy;
dmacap,xor; dmacap,xor;
dmacap,memset; dmacap,memset;
......
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