Commit f3dd7e60 authored by Pingchao Yang's avatar Pingchao Yang Committed by Herbert Xu

crypto: qat - add support for MMP FW

Load Modular Math Processor(MMP) firmware into QAT devices to support
public key algorithm acceleration.
Signed-off-by: default avatarPingchao Yang <pingchao.yang@intel.com>
Signed-off-by: default avatarTadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 544c436a
...@@ -135,6 +135,7 @@ struct adf_hw_device_data { ...@@ -135,6 +135,7 @@ struct adf_hw_device_data {
struct adf_hw_device_class *dev_class; struct adf_hw_device_class *dev_class;
uint32_t (*get_accel_mask)(uint32_t fuse); uint32_t (*get_accel_mask)(uint32_t fuse);
uint32_t (*get_ae_mask)(uint32_t fuse); uint32_t (*get_ae_mask)(uint32_t fuse);
uint32_t (*get_sram_bar_id)(struct adf_hw_device_data *self);
uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self); uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self); uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
uint32_t (*get_num_aes)(struct adf_hw_device_data *self); uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
......
...@@ -196,4 +196,6 @@ int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); ...@@ -196,4 +196,6 @@ int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle); void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle);
int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
void *addr_ptr, int mem_size); void *addr_ptr, int mem_size);
void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
void *addr_ptr, int mem_size);
#endif #endif
...@@ -679,21 +679,24 @@ int qat_hal_init(struct adf_accel_dev *accel_dev) ...@@ -679,21 +679,24 @@ int qat_hal_init(struct adf_accel_dev *accel_dev)
struct icp_qat_fw_loader_handle *handle; struct icp_qat_fw_loader_handle *handle;
struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev; struct adf_accel_pci *pci_info = &accel_dev->accel_pci_dev;
struct adf_hw_device_data *hw_data = accel_dev->hw_device; struct adf_hw_device_data *hw_data = accel_dev->hw_device;
struct adf_bar *bar = struct adf_bar *misc_bar =
&pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)]; &pci_info->pci_bars[hw_data->get_misc_bar_id(hw_data)];
struct adf_bar *sram_bar =
&pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
handle = kzalloc(sizeof(*handle), GFP_KERNEL); handle = kzalloc(sizeof(*handle), GFP_KERNEL);
if (!handle) if (!handle)
return -ENOMEM; return -ENOMEM;
handle->hal_cap_g_ctl_csr_addr_v = bar->virt_addr + handle->hal_cap_g_ctl_csr_addr_v = misc_bar->virt_addr +
ICP_DH895XCC_CAP_OFFSET; ICP_DH895XCC_CAP_OFFSET;
handle->hal_cap_ae_xfer_csr_addr_v = bar->virt_addr + handle->hal_cap_ae_xfer_csr_addr_v = misc_bar->virt_addr +
ICP_DH895XCC_AE_OFFSET; ICP_DH895XCC_AE_OFFSET;
handle->hal_ep_csr_addr_v = bar->virt_addr + ICP_DH895XCC_EP_OFFSET; handle->hal_ep_csr_addr_v = misc_bar->virt_addr +
ICP_DH895XCC_EP_OFFSET;
handle->hal_cap_ae_local_csr_addr_v = handle->hal_cap_ae_local_csr_addr_v =
handle->hal_cap_ae_xfer_csr_addr_v + LOCAL_TO_XFER_REG_OFFSET; handle->hal_cap_ae_xfer_csr_addr_v + LOCAL_TO_XFER_REG_OFFSET;
handle->hal_sram_addr_v = sram_bar->virt_addr;
handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL); handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL);
if (!handle->hal_handle) if (!handle->hal_handle)
goto out_hal_handle; goto out_hal_handle;
......
...@@ -359,28 +359,7 @@ static int qat_uclo_init_umem_seg(struct icp_qat_fw_loader_handle *handle, ...@@ -359,28 +359,7 @@ static int qat_uclo_init_umem_seg(struct icp_qat_fw_loader_handle *handle,
static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle, static int qat_uclo_init_ae_memory(struct icp_qat_fw_loader_handle *handle,
struct icp_qat_uof_initmem *init_mem) struct icp_qat_uof_initmem *init_mem)
{ {
unsigned int i;
struct icp_qat_uof_memvar_attr *mem_val_attr;
mem_val_attr =
(struct icp_qat_uof_memvar_attr *)((unsigned long)init_mem +
sizeof(struct icp_qat_uof_initmem));
switch (init_mem->region) { switch (init_mem->region) {
case ICP_QAT_UOF_SRAM_REGION:
if ((init_mem->addr + init_mem->num_in_bytes) >
ICP_DH895XCC_PESRAM_BAR_SIZE) {
pr_err("QAT: initmem on SRAM is out of range");
return -EINVAL;
}
for (i = 0; i < init_mem->val_attr_num; i++) {
qat_uclo_wr_sram_by_words(handle,
init_mem->addr +
mem_val_attr->offset_in_byte,
&mem_val_attr->value, 4);
mem_val_attr++;
}
break;
case ICP_QAT_UOF_LMEM_REGION: case ICP_QAT_UOF_LMEM_REGION:
if (qat_uclo_init_lmem_seg(handle, init_mem)) if (qat_uclo_init_lmem_seg(handle, init_mem))
return -EINVAL; return -EINVAL;
...@@ -990,6 +969,12 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle) ...@@ -990,6 +969,12 @@ static int qat_uclo_parse_uof_obj(struct icp_qat_fw_loader_handle *handle)
return -EFAULT; return -EFAULT;
} }
void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
void *addr_ptr, int mem_size)
{
qat_uclo_wr_sram_by_words(handle, 0, addr_ptr, ALIGN(mem_size, 4));
}
int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle, int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
void *addr_ptr, int mem_size) void *addr_ptr, int mem_size)
{ {
......
...@@ -117,6 +117,11 @@ static uint32_t get_etr_bar_id(struct adf_hw_device_data *self) ...@@ -117,6 +117,11 @@ static uint32_t get_etr_bar_id(struct adf_hw_device_data *self)
return ADF_DH895XCC_ETR_BAR; return ADF_DH895XCC_ETR_BAR;
} }
static uint32_t get_sram_bar_id(struct adf_hw_device_data *self)
{
return ADF_DH895XCC_SRAM_BAR;
}
static enum dev_sku_info get_sku(struct adf_hw_device_data *self) static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
{ {
int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK) int sku = (self->fuses & ADF_DH895XCC_FUSECTL_SKU_MASK)
...@@ -219,6 +224,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data) ...@@ -219,6 +224,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
hw_data->get_num_aes = get_num_aes; hw_data->get_num_aes = get_num_aes;
hw_data->get_etr_bar_id = get_etr_bar_id; hw_data->get_etr_bar_id = get_etr_bar_id;
hw_data->get_misc_bar_id = get_misc_bar_id; hw_data->get_misc_bar_id = get_misc_bar_id;
hw_data->get_sram_bar_id = get_sram_bar_id;
hw_data->get_sku = get_sku; hw_data->get_sku = get_sku;
hw_data->fw_name = ADF_DH895XCC_FW; hw_data->fw_name = ADF_DH895XCC_FW;
hw_data->init_admin_comms = adf_init_admin_comms; hw_data->init_admin_comms = adf_init_admin_comms;
......
...@@ -48,6 +48,7 @@ ...@@ -48,6 +48,7 @@
#define ADF_DH895x_HW_DATA_H_ #define ADF_DH895x_HW_DATA_H_
/* PCIe configuration space */ /* PCIe configuration space */
#define ADF_DH895XCC_SRAM_BAR 0
#define ADF_DH895XCC_PMISC_BAR 1 #define ADF_DH895XCC_PMISC_BAR 1
#define ADF_DH895XCC_ETR_BAR 2 #define ADF_DH895XCC_ETR_BAR 2
#define ADF_DH895XCC_RX_RINGS_OFFSET 8 #define ADF_DH895XCC_RX_RINGS_OFFSET 8
......
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