Commit f5eab267 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer fixes from Thomas Gleixner:
 "The last round of minimalistic fixes for clocksource drivers:

   - Prevent multiple shutdown of the sh_mtu2 clocksource

   - Annotate a bunch of clocksource/schedclock functions with notrace
     to prevent an annoying ftrace recursion issue"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  clocksource/drivers/sh_mtu2: Fix multiple shutdown call issue
  clocksource/drivers/digicolor: Prevent ftrace recursion
  clocksource/drivers/fsl_ftm_timer: Prevent ftrace recursion
  clocksource/drivers/vf_pit_timer: Prevent ftrace recursion
  clocksource/drivers/prima2: Prevent ftrace recursion
  clocksource/drivers/samsung_pwm_timer: Prevent ftrace recursion
  clocksource/drivers/pistachio: Prevent ftrace recursion
  clocksource/drivers/arm_global_timer: Prevent ftrace recursion
parents 4bf690d7 fe326c5c
......@@ -60,7 +60,7 @@ static struct clock_event_device __percpu *gt_evt;
* different to the 32-bit upper value read previously, go back to step 2.
* Otherwise the 64-bit timer counter value is correct.
*/
static u64 gt_counter_read(void)
static u64 notrace _gt_counter_read(void)
{
u64 counter;
u32 lower;
......@@ -79,6 +79,11 @@ static u64 gt_counter_read(void)
return counter;
}
static u64 gt_counter_read(void)
{
return _gt_counter_read();
}
/**
* To ensure that updates to comparator value register do not set the
* Interrupt Status Register proceed as follows:
......@@ -201,7 +206,7 @@ static struct clocksource gt_clocksource = {
#ifdef CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
static u64 notrace gt_sched_clock_read(void)
{
return gt_counter_read();
return _gt_counter_read();
}
#endif
......
......@@ -118,7 +118,7 @@ static inline void ftm_reset_counter(void __iomem *base)
ftm_writel(0x00, base + FTM_CNT);
}
static u64 ftm_read_sched_clock(void)
static u64 notrace ftm_read_sched_clock(void)
{
return ftm_readl(priv->clksrc_base + FTM_CNT);
}
......
......@@ -307,7 +307,7 @@ static void samsung_clocksource_resume(struct clocksource *cs)
samsung_time_start(pwm.source_id, true);
}
static cycle_t samsung_clocksource_read(struct clocksource *c)
static cycle_t notrace samsung_clocksource_read(struct clocksource *c)
{
return ~readl_relaxed(pwm.source_reg);
}
......
......@@ -280,7 +280,9 @@ static int sh_mtu2_clock_event_shutdown(struct clock_event_device *ced)
{
struct sh_mtu2_channel *ch = ced_to_sh_mtu2(ced);
if (clockevent_state_periodic(ced))
sh_mtu2_disable(ch);
return 0;
}
......
......@@ -67,7 +67,8 @@ static inline void gpt_writel(void __iomem *base, u32 value, u32 offset,
writel(value, base + 0x20 * gpt_id + offset);
}
static cycle_t pistachio_clocksource_read_cycles(struct clocksource *cs)
static cycle_t notrace
pistachio_clocksource_read_cycles(struct clocksource *cs)
{
struct pistachio_clocksource *pcs = to_pistachio_clocksource(cs);
u32 counter, overflw;
......
......@@ -143,7 +143,7 @@ static irqreturn_t digicolor_timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
static u64 digicolor_timer_sched_read(void)
static u64 notrace digicolor_timer_sched_read(void)
{
return ~readl(dc_timer_dev.base + COUNT(TIMER_B));
}
......
......@@ -73,7 +73,7 @@ static irqreturn_t sirfsoc_timer_interrupt(int irq, void *dev_id)
}
/* read 64-bit timer counter */
static cycle_t sirfsoc_timer_read(struct clocksource *cs)
static cycle_t notrace sirfsoc_timer_read(struct clocksource *cs)
{
u64 cycles;
......
......@@ -52,7 +52,7 @@ static inline void pit_irq_acknowledge(void)
__raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
}
static u64 pit_read_sched_clock(void)
static u64 notrace pit_read_sched_clock(void)
{
return ~__raw_readl(clksrc_base + PITCVAL);
}
......
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