Commit f7f31e50 authored by Jingoo Han's avatar Jingoo Han Committed by Florian Tobias Schandinat

video: s3c-fb: add alpha value width setting

This patch adds alpha value width setting according to
transparency value of each window format, using BLENDCON
register. When alpha value is 8 bits, BLENDCON will set
alpha value width as 8 bits.
Signed-off-by: default avatarJingoo Han <jg1.han@samsung.com>
Signed-off-by: default avatarFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
parent 05e52b4b
...@@ -384,3 +384,9 @@ ...@@ -384,3 +384,9 @@
#define WPALCON_W0PAL_16BPP_A555 (0x5 << 0) #define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
#define WPALCON_W0PAL_16BPP_565 (0x6 << 0) #define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
/* Blending equation control */
#define BLENDCON (0x260)
#define BLENDCON_NEW_MASK (1 << 0)
#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
...@@ -82,6 +82,7 @@ struct s3c_fb; ...@@ -82,6 +82,7 @@ struct s3c_fb;
* @palette: Address of palette memory, or 0 if none. * @palette: Address of palette memory, or 0 if none.
* @has_prtcon: Set if has PRTCON register. * @has_prtcon: Set if has PRTCON register.
* @has_shadowcon: Set if has SHADOWCON register. * @has_shadowcon: Set if has SHADOWCON register.
* @has_blendcon: Set if has BLENDCON register.
* @has_clksel: Set if VIDCON0 register has CLKSEL bit. * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
*/ */
struct s3c_fb_variant { struct s3c_fb_variant {
...@@ -100,6 +101,7 @@ struct s3c_fb_variant { ...@@ -100,6 +101,7 @@ struct s3c_fb_variant {
unsigned int has_prtcon:1; unsigned int has_prtcon:1;
unsigned int has_shadowcon:1; unsigned int has_shadowcon:1;
unsigned int has_blendcon:1;
unsigned int has_clksel:1; unsigned int has_clksel:1;
}; };
...@@ -691,6 +693,17 @@ static int s3c_fb_set_par(struct fb_info *info) ...@@ -691,6 +693,17 @@ static int s3c_fb_set_par(struct fb_info *info)
writel(data, regs + sfb->variant.wincon + (win_no * 4)); writel(data, regs + sfb->variant.wincon + (win_no * 4));
writel(0x0, regs + sfb->variant.winmap + (win_no * 4)); writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
/* Set alpha value width */
if (sfb->variant.has_blendcon) {
data = readl(sfb->regs + BLENDCON);
data &= ~BLENDCON_NEW_MASK;
if (var->transp.length > 4)
data |= BLENDCON_NEW_8BIT_ALPHA_VALUE;
else
data |= BLENDCON_NEW_4BIT_ALPHA_VALUE;
writel(data, sfb->regs + BLENDCON);
}
shadow_protect_win(win, 0); shadow_protect_win(win, 0);
pm_runtime_put_sync(sfb->dev); pm_runtime_put_sync(sfb->dev);
...@@ -1798,6 +1811,7 @@ static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = { ...@@ -1798,6 +1811,7 @@ static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
}, },
.has_prtcon = 1, .has_prtcon = 1,
.has_blendcon = 1,
.has_clksel = 1, .has_clksel = 1,
}, },
.win[0] = &s3c_fb_data_s5p_wins[0], .win[0] = &s3c_fb_data_s5p_wins[0],
...@@ -1829,6 +1843,7 @@ static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = { ...@@ -1829,6 +1843,7 @@ static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
}, },
.has_shadowcon = 1, .has_shadowcon = 1,
.has_blendcon = 1,
.has_clksel = 1, .has_clksel = 1,
}, },
.win[0] = &s3c_fb_data_s5p_wins[0], .win[0] = &s3c_fb_data_s5p_wins[0],
...@@ -1860,6 +1875,7 @@ static struct s3c_fb_driverdata s3c_fb_data_exynos4 = { ...@@ -1860,6 +1875,7 @@ static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
}, },
.has_shadowcon = 1, .has_shadowcon = 1,
.has_blendcon = 1,
}, },
.win[0] = &s3c_fb_data_s5p_wins[0], .win[0] = &s3c_fb_data_s5p_wins[0],
.win[1] = &s3c_fb_data_s5p_wins[1], .win[1] = &s3c_fb_data_s5p_wins[1],
...@@ -1923,6 +1939,8 @@ static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = { ...@@ -1923,6 +1939,8 @@ static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
[1] = 0x2800, [1] = 0x2800,
[2] = 0x2c00, [2] = 0x2c00,
}, },
.has_blendcon = 1,
}, },
.win[0] = &s3c_fb_data_s5p_wins[0], .win[0] = &s3c_fb_data_s5p_wins[0],
.win[1] = &s3c_fb_data_s5p_wins[1], .win[1] = &s3c_fb_data_s5p_wins[1],
......
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