Commit fa1d19e5 authored by Troy Heber's avatar Troy Heber Committed by Tony Luck

[IA64] move SAL_CACHE_FLUSH check later in boot

The check to see if the firmware drops interrupts during a
SAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects
to be able to make PAL calls in virtual mode, on some cell based
machines a fault occurs causing a MCA. This patch moves the check
after mmu_context_init so the TLB and VHPT are properly setup.

Signed-off-by Troy Heber <troy.heber@hp.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent 264b0f99
...@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { } ...@@ -223,12 +223,13 @@ static void __init sal_desc_ap_wakeup(void *p) { }
*/ */
static int sal_cache_flush_drops_interrupts; static int sal_cache_flush_drops_interrupts;
static void __init void __init
check_sal_cache_flush (void) check_sal_cache_flush (void)
{ {
unsigned long flags; unsigned long flags;
int cpu; int cpu;
u64 vector; u64 vector, cache_type = 3;
struct ia64_sal_retval isrv;
cpu = get_cpu(); cpu = get_cpu();
local_irq_save(flags); local_irq_save(flags);
...@@ -243,7 +244,10 @@ check_sal_cache_flush (void) ...@@ -243,7 +244,10 @@ check_sal_cache_flush (void)
while (!ia64_get_irr(IA64_TIMER_VECTOR)) while (!ia64_get_irr(IA64_TIMER_VECTOR))
cpu_relax(); cpu_relax();
ia64_sal_cache_flush(3); SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
if (isrv.status)
printk(KERN_ERR "SAL_CAL_FLUSH failed with %ld\n", isrv.status);
if (ia64_get_irr(IA64_TIMER_VECTOR)) { if (ia64_get_irr(IA64_TIMER_VECTOR)) {
vector = ia64_get_ivr(); vector = ia64_get_ivr();
...@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab) ...@@ -331,7 +335,6 @@ ia64_sal_init (struct ia64_sal_systab *systab)
p += SAL_DESC_SIZE(*p); p += SAL_DESC_SIZE(*p);
} }
check_sal_cache_flush();
} }
int int
......
...@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p) ...@@ -457,6 +457,8 @@ setup_arch (char **cmdline_p)
cpu_init(); /* initialize the bootstrap CPU */ cpu_init(); /* initialize the bootstrap CPU */
mmu_context_init(); /* initialize context_id bitmap */ mmu_context_init(); /* initialize context_id bitmap */
check_sal_cache_flush();
#ifdef CONFIG_ACPI #ifdef CONFIG_ACPI
acpi_boot_init(); acpi_boot_init();
#endif #endif
......
...@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second, ...@@ -659,6 +659,7 @@ ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
} }
extern s64 ia64_sal_cache_flush (u64 cache_type); extern s64 ia64_sal_cache_flush (u64 cache_type);
extern void __init check_sal_cache_flush (void);
/* Initialize all the processor and platform level instruction and data caches */ /* Initialize all the processor and platform level instruction and data caches */
static inline s64 static inline s64
......
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