Commit fa439059 authored by Min Li's avatar Min Li Committed by Jakub Kicinski

ptp: clockmatrix: remove 5 second delay before entering write phase mode

Remove write phase mode 5 second setup delay, not needed.
Signed-off-by: default avatarMin Li <min.li.xe@renesas.com>
Link: https://lore.kernel.org/r/1607442117-13661-2-git-send-email-min.li.xe@renesas.comSigned-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 251f4fe2
...@@ -70,16 +70,6 @@ static int contains_full_configuration(const struct firmware *fw) ...@@ -70,16 +70,6 @@ static int contains_full_configuration(const struct firmware *fw)
return (count >= full_count); return (count >= full_count);
} }
static long set_write_phase_ready(struct ptp_clock_info *ptp)
{
struct idtcm_channel *channel =
container_of(ptp, struct idtcm_channel, caps);
channel->write_phase_ready = 1;
return 0;
}
static int char_array_to_timespec(u8 *buf, static int char_array_to_timespec(u8 *buf,
u8 count, u8 count,
struct timespec64 *ts) struct timespec64 *ts)
...@@ -1339,16 +1329,8 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns) ...@@ -1339,16 +1329,8 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns)
if (err) if (err)
return err; return err;
channel->write_phase_ready = 0;
ptp_schedule_worker(channel->ptp_clock,
msecs_to_jiffies(WR_PHASE_SETUP_MS));
} }
if (!channel->write_phase_ready)
delta_ns = 0;
offset_ps = (s64)delta_ns * 1000; offset_ps = (s64)delta_ns * 1000;
/* /*
...@@ -1928,7 +1910,6 @@ static const struct ptp_clock_info idtcm_caps_v487 = { ...@@ -1928,7 +1910,6 @@ static const struct ptp_clock_info idtcm_caps_v487 = {
.gettime64 = &idtcm_gettime, .gettime64 = &idtcm_gettime,
.settime64 = &idtcm_settime_v487, .settime64 = &idtcm_settime_v487,
.enable = &idtcm_enable, .enable = &idtcm_enable,
.do_aux_work = &set_write_phase_ready,
}; };
static const struct ptp_clock_info idtcm_caps = { static const struct ptp_clock_info idtcm_caps = {
...@@ -1941,7 +1922,6 @@ static const struct ptp_clock_info idtcm_caps = { ...@@ -1941,7 +1922,6 @@ static const struct ptp_clock_info idtcm_caps = {
.gettime64 = &idtcm_gettime, .gettime64 = &idtcm_gettime,
.settime64 = &idtcm_settime, .settime64 = &idtcm_settime,
.enable = &idtcm_enable, .enable = &idtcm_enable,
.do_aux_work = &set_write_phase_ready,
}; };
static int configure_channel_pll(struct idtcm_channel *channel) static int configure_channel_pll(struct idtcm_channel *channel)
...@@ -2111,8 +2091,6 @@ static int idtcm_enable_channel(struct idtcm *idtcm, u32 index) ...@@ -2111,8 +2091,6 @@ static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
if (!channel->ptp_clock) if (!channel->ptp_clock)
return -ENOTSUPP; return -ENOTSUPP;
channel->write_phase_ready = 0;
dev_info(&idtcm->client->dev, "PLL%d registered as ptp%d\n", dev_info(&idtcm->client->dev, "PLL%d registered as ptp%d\n",
index, channel->ptp_clock->index); index, channel->ptp_clock->index);
......
...@@ -125,7 +125,6 @@ struct idtcm_channel { ...@@ -125,7 +125,6 @@ struct idtcm_channel {
enum pll_mode pll_mode; enum pll_mode pll_mode;
u8 pll; u8 pll;
u16 output_mask; u16 output_mask;
int write_phase_ready;
}; };
struct idtcm { struct idtcm {
......
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