Commit fb2aa855 authored by Vincent Guittot's avatar Vincent Guittot Committed by Ingo Molnar

sched, ARM: Create a dedicated scheduler topology table

Create a dedicated topology table for ARM which will create new level to
differentiate CPUs that can or not powergate independantly from others.

The patch gives an example of how to add domain that will take advantage of
SD_SHARE_POWERDOMAIN.
Signed-off-by: default avatarVincent Guittot <vincent.guittot@linaro.org>
Reviewed-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Tested-by: default avatarDietmar Eggemann <dietmar.eggemann@arm.com>
Signed-off-by: default avatarPeter Zijlstra <peterz@infradead.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mark Brown <broonie@linaro.org>
Cc: Nicolas Pitre <nico@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
Cc: schwidefsky@de.ibm.com
Cc: cmetcalf@tilera.com
Cc: benh@kernel.crashing.org
Cc: preeti@linux.vnet.ibm.com
Link: http://lkml.kernel.org/r/1397209481-28542-6-git-send-email-vincent.guittot@linaro.orgSigned-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent d77b3ed5
...@@ -185,6 +185,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu) ...@@ -185,6 +185,15 @@ const struct cpumask *cpu_coregroup_mask(int cpu)
return &cpu_topology[cpu].core_sibling; return &cpu_topology[cpu].core_sibling;
} }
/*
* The current assumption is that we can power gate each core independently.
* This will be superseded by DT binding once available.
*/
const struct cpumask *cpu_corepower_mask(int cpu)
{
return &cpu_topology[cpu].thread_sibling;
}
static void update_siblings_masks(unsigned int cpuid) static void update_siblings_masks(unsigned int cpuid)
{ {
struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid];
...@@ -266,6 +275,20 @@ void store_cpu_topology(unsigned int cpuid) ...@@ -266,6 +275,20 @@ void store_cpu_topology(unsigned int cpuid)
cpu_topology[cpuid].socket_id, mpidr); cpu_topology[cpuid].socket_id, mpidr);
} }
static inline const int cpu_corepower_flags(void)
{
return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN;
}
static struct sched_domain_topology_level arm_topology[] = {
#ifdef CONFIG_SCHED_MC
{ cpu_corepower_mask, cpu_corepower_flags, SD_INIT_NAME(GMC) },
{ cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
#endif
{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
{ NULL, },
};
/* /*
* init_cpu_topology is called at boot when only one cpu is running * init_cpu_topology is called at boot when only one cpu is running
* which prevent simultaneous write access to cpu_topology array * which prevent simultaneous write access to cpu_topology array
...@@ -289,4 +312,7 @@ void __init init_cpu_topology(void) ...@@ -289,4 +312,7 @@ void __init init_cpu_topology(void)
smp_wmb(); smp_wmb();
parse_dt_topology(); parse_dt_topology();
/* Set scheduler topology descriptor */
set_sched_topology(arm_topology);
} }
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