Commit fc192e50 authored by Tony Wu's avatar Tony Wu Committed by Ralf Baechle

MIPS: Cleanup indentation and whitespace

Signed-off-by: default avatarTony Wu <tung7970@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5536/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 4df715aa
...@@ -162,18 +162,18 @@ ...@@ -162,18 +162,18 @@
#ifndef cpu_has_mips_5 #ifndef cpu_has_mips_5
# define cpu_has_mips_5 (cpu_data[0].isa_level & MIPS_CPU_ISA_V) # define cpu_has_mips_5 (cpu_data[0].isa_level & MIPS_CPU_ISA_V)
#endif #endif
# ifndef cpu_has_mips32r1 #ifndef cpu_has_mips32r1
# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) # define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1)
# endif #endif
# ifndef cpu_has_mips32r2 #ifndef cpu_has_mips32r2
# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) # define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
# endif #endif
# ifndef cpu_has_mips64r1 #ifndef cpu_has_mips64r1
# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) # define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
# endif #endif
# ifndef cpu_has_mips64r2 #ifndef cpu_has_mips64r2
# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) # define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
# endif #endif
/* /*
* Shortcuts ... * Shortcuts ...
...@@ -195,9 +195,9 @@ ...@@ -195,9 +195,9 @@
* has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels * has CLO and CLZ but not DCLO nor DCLZ. For 64-bit kernels
* cpu_has_clo_clz also indicates the availability of DCLO and DCLZ. * cpu_has_clo_clz also indicates the availability of DCLO and DCLZ.
*/ */
# ifndef cpu_has_clo_clz #ifndef cpu_has_clo_clz
# define cpu_has_clo_clz cpu_has_mips_r #define cpu_has_clo_clz cpu_has_mips_r
# endif #endif
#ifndef cpu_has_dsp #ifndef cpu_has_dsp
#define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP)
......
...@@ -12,8 +12,8 @@ ...@@ -12,8 +12,8 @@
/* Intentionally empty macro, used in head.S. Override in /* Intentionally empty macro, used in head.S. Override in
* arch/mips/mach-xxx/kernel-entry-init.h when necessary. * arch/mips/mach-xxx/kernel-entry-init.h when necessary.
*/ */
.macro kernel_entry_setup .macro kernel_entry_setup
.endm .endm
/* /*
* Do SMP slave processor setup necessary before we can savely execute C code. * Do SMP slave processor setup necessary before we can savely execute C code.
......
...@@ -467,5 +467,4 @@ int __compute_return_epc(struct pt_regs *regs) ...@@ -467,5 +467,4 @@ int __compute_return_epc(struct pt_regs *regs)
printk("%s: unaligned epc - sending SIGBUS.\n", current->comm); printk("%s: unaligned epc - sending SIGBUS.\n", current->comm);
force_sig(SIGBUS, current); force_sig(SIGBUS, current);
return -EFAULT; return -EFAULT;
} }
...@@ -1549,6 +1549,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr) ...@@ -1549,6 +1549,7 @@ static void emulate_load_store_MIPS16e(struct pt_regs *regs, void __user * addr)
("Unhandled kernel unaligned access or invalid instruction", regs); ("Unhandled kernel unaligned access or invalid instruction", regs);
force_sig(SIGILL, current); force_sig(SIGILL, current);
} }
asmlinkage void do_ade(struct pt_regs *regs) asmlinkage void do_ade(struct pt_regs *regs)
{ {
enum ctx_state prev_state; enum ctx_state prev_state;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment