Commit fc252a2b authored by Don Fry's avatar Don Fry Committed by Jeff Garzik

[PATCH] pcnet32 transmit performance fix

When the pcnet32 adapter is installed in a system with long PCI latency
and the read burst bit is not set, performance on transmission is very
low (under 20Mbit on a 100Mbit link).  This patch against 2.6.6-rc1 will
make sure that read and write bursts are enabled.  Tested on ppc64 and
ia32.
parent 73da2ff6
...@@ -1022,10 +1022,11 @@ pcnet32_probe1(unsigned long ioaddr, unsigned int irq_line, int shared, ...@@ -1022,10 +1022,11 @@ pcnet32_probe1(unsigned long ioaddr, unsigned int irq_line, int shared,
* starting until the packet is loaded. Strike one for reliability, lose * starting until the packet is loaded. Strike one for reliability, lose
* one for latency - although on PCI this isnt a big loss. Older chips * one for latency - although on PCI this isnt a big loss. Older chips
* have FIFO's smaller than a packet, so you can't do this. * have FIFO's smaller than a packet, so you can't do this.
* Turn on BCR18:BurstRdEn and BCR18:BurstWrEn.
*/ */
if (fset) { if (fset) {
a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0800)); a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860));
a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00); a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00);
dxsuflo = 1; dxsuflo = 1;
ltint = 1; ltint = 1;
......
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