Commit fd91d38b authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher

drm/amdgpu: Use logical ids for VCN/JPEG v4.0.3

Address VCN/JPEG instances using logical ids. Whenever register access is
required, get the physical instance using GET_INST.
Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Tested-by: default avatarJames Zhu <James.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 07bc0ac8
...@@ -144,14 +144,19 @@ ...@@ -144,14 +144,19 @@
#define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \ #define WREG32_SOC15_DPG_MODE(inst_idx, offset, value, mask_en, indirect) \
do { \ do { \
if (!indirect) { \ if (!indirect) { \
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_DATA, value); \ WREG32_SOC15(VCN, GET_INST(VCN, inst_idx), \
WREG32_SOC15(VCN, inst_idx, mmUVD_DPG_LMA_CTL, \ mmUVD_DPG_LMA_DATA, value); \
WREG32_SOC15( \
VCN, GET_INST(VCN, inst_idx), \
mmUVD_DPG_LMA_CTL, \
(0x1 << UVD_DPG_LMA_CTL__READ_WRITE__SHIFT | \ (0x1 << UVD_DPG_LMA_CTL__READ_WRITE__SHIFT | \
mask_en << UVD_DPG_LMA_CTL__MASK_EN__SHIFT | \ mask_en << UVD_DPG_LMA_CTL__MASK_EN__SHIFT | \
offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \ offset << UVD_DPG_LMA_CTL__READ_WRITE_ADDR__SHIFT)); \
} else { \ } else { \
*adev->vcn.inst[inst_idx].dpg_sram_curr_addr++ = offset; \ *adev->vcn.inst[inst_idx].dpg_sram_curr_addr++ = \
*adev->vcn.inst[inst_idx].dpg_sram_curr_addr++ = value; \ offset; \
*adev->vcn.inst[inst_idx].dpg_sram_curr_addr++ = \
value; \
} \ } \
} while (0) } while (0)
......
...@@ -70,6 +70,8 @@ static int8_t aqua_vanjaram_logical_to_dev_inst(struct amdgpu_device *adev, ...@@ -70,6 +70,8 @@ static int8_t aqua_vanjaram_logical_to_dev_inst(struct amdgpu_device *adev,
switch (block) { switch (block) {
case GC_HWIP: case GC_HWIP:
case SDMA0_HWIP: case SDMA0_HWIP:
/* Both JPEG and VCN as JPEG is only alias of VCN */
case VCN_HWIP:
dev_inst = adev->ip_map.dev_inst[block][inst]; dev_inst = adev->ip_map.dev_inst[block][inst];
break; break;
default: default:
...@@ -379,7 +381,7 @@ static int aqua_vanjaram_xcp_mgr_init(struct amdgpu_device *adev) ...@@ -379,7 +381,7 @@ static int aqua_vanjaram_xcp_mgr_init(struct amdgpu_device *adev)
int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev) int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev)
{ {
u32 mask, inst_mask = adev->sdma.sdma_mask; u32 mask, inst_mask = adev->sdma.sdma_mask;
int ret, i, num_inst; int ret, i;
/* generally 1 AID supports 4 instances */ /* generally 1 AID supports 4 instances */
adev->sdma.num_inst_per_aid = 4; adev->sdma.num_inst_per_aid = 4;
...@@ -394,11 +396,15 @@ int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev) ...@@ -394,11 +396,15 @@ int aqua_vanjaram_init_soc_config(struct amdgpu_device *adev)
adev->aid_mask |= (1 << i); adev->aid_mask |= (1 << i);
} }
num_inst = hweight32(adev->aid_mask); /* Harvest config is not used for aqua vanjaram. VCN and JPEGs will be
* addressed based on logical instance ids.
*/
adev->vcn.harvest_config = 0;
adev->vcn.num_inst_per_aid = 1; adev->vcn.num_inst_per_aid = 1;
adev->vcn.num_vcn_inst = adev->vcn.num_inst_per_aid * num_inst; adev->vcn.num_vcn_inst = hweight32(adev->vcn.inst_mask);
adev->jpeg.harvest_config = 0;
adev->jpeg.num_inst_per_aid = 1; adev->jpeg.num_inst_per_aid = 1;
adev->jpeg.num_jpeg_inst = adev->jpeg.num_inst_per_aid * num_inst; adev->jpeg.num_jpeg_inst = hweight32(adev->jpeg.inst_mask);
ret = aqua_vanjaram_xcp_mgr_init(adev); ret = aqua_vanjaram_xcp_mgr_init(adev);
if (ret) if (ret)
......
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