Commit fdb1742a authored by Conor Dooley's avatar Conor Dooley Committed by Palmer Dabbelt

irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC

The SiFive PLIC driver is used by all current implementations, including
those that do not have a SiFive PLIC. The current driver supports more
than just SiFive PLICs at present and, where possible, future PLIC
implementations will also use this driver. As every supported RISC-V SoC
selects the driver directly in Kconfig.socs there's no point in exposing
this kconfig option to users.

The Kconfig help text, in its current form, is misleading. There's no
point doing anything about that though, as it will no longer be user
selectable. Remove it.
Suggested-by: default avatarMarc Zyngier <maz@kernel.org>
Signed-off-by: default avatarConor Dooley <conor.dooley@microchip.com>
Acked-by: default avatarMarc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221118104300.85016-2-conor@kernel.orgSigned-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent 9abf2313
...@@ -551,18 +551,10 @@ config RISCV_INTC ...@@ -551,18 +551,10 @@ config RISCV_INTC
If you don't know what to do here, say Y. If you don't know what to do here, say Y.
config SIFIVE_PLIC config SIFIVE_PLIC
bool "SiFive Platform-Level Interrupt Controller" bool
depends on RISCV depends on RISCV
select IRQ_DOMAIN_HIERARCHY select IRQ_DOMAIN_HIERARCHY
select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP
help
This enables support for the PLIC chip found in SiFive (and
potentially other) RISC-V systems. The PLIC controls devices
interrupts and connects them to each core's local interrupt
controller. Aside from timer and software interrupts, all other
interrupt sources are subordinate to the PLIC.
If you don't know what to do here, say Y.
config EXYNOS_IRQ_COMBINER config EXYNOS_IRQ_COMBINER
bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST
......
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