Commit ff877c49 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull "ARM: More SoC driver updates" from Olof Johansson:
 "This branch contains a handful of driver updates, mostly to the
  LPC32xx platform but also for Samsung EXYNOS and Davinci.

  It had a few context conflicts against patches already merged through
  fixes-non-critical.  We should have resolved this early during the
  development cycle by pulling them in as a dependency, instead I did it
  after the fact this time."

* tag 'drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
  gpio/samsung: use ioremap() for EXYNOS4 GPIOlib
  gpio/samsung: add support GPIOlib for EXYNOS5250
  ARM: EXYNOS: add support GPIO for EXYNOS5250
  ARM: LPC32xx: Ethernet support
  ARM: LPC32xx: USB Support
  ARM: davinci: dm644x evm: add support for VPBE display
  ARM: davinci: dm644x: add support for v4l2 video display
  ARM: EXYNOS: Hook up JPEG PD to generic PD infrastructure
  ARM: EXYNOS: Hook up G2D PD to generic PD infrastructure
  arm: lpc32xx: phy3250: add rtc & touch device
  ARM: LPC32xx: clock.c: Clock registration fixes
  ARM: LPC32xx: clock.c: jiffies wrapping
  ARM: LPC32xx: clock.c: Missing header file
  ARM: LPC32XX: Remove broken non-static declaration
  ARM: LPC32xx: clock.c: Fix mutex lock issues
  ARM: LPC32xx: clock.c: warning fix
  ARM: LPC32xx: Added lpc32xx_defconfig
parents 529b73fc 1f5b7dcf
......@@ -613,6 +613,113 @@ static void __init evm_init_i2c(void)
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}
#define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
/* venc standard timings */
static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
{
.name = "ntsc",
.timings_type = VPBE_ENC_STD,
.timings = {V4L2_STD_525_60},
.interlaced = 1,
.xres = 720,
.yres = 480,
.aspect = {11, 10},
.fps = {30000, 1001},
.left_margin = 0x79,
.upper_margin = 0x10,
},
{
.name = "pal",
.timings_type = VPBE_ENC_STD,
.timings = {V4L2_STD_625_50},
.interlaced = 1,
.xres = 720,
.yres = 576,
.aspect = {54, 59},
.fps = {25, 1},
.left_margin = 0x7e,
.upper_margin = 0x16,
},
};
/* venc dv preset timings */
static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
{
.name = "480p59_94",
.timings_type = VPBE_ENC_DV_PRESET,
.timings = {V4L2_DV_480P59_94},
.interlaced = 0,
.xres = 720,
.yres = 480,
.aspect = {1, 1},
.fps = {5994, 100},
.left_margin = 0x80,
.upper_margin = 0x20,
},
{
.name = "576p50",
.timings_type = VPBE_ENC_DV_PRESET,
.timings = {V4L2_DV_576P50},
.interlaced = 0,
.xres = 720,
.yres = 576,
.aspect = {1, 1},
.fps = {50, 1},
.left_margin = 0x7e,
.upper_margin = 0x30,
},
};
/*
* The outputs available from VPBE + encoders. Keep the order same
* as that of encoders. First those from venc followed by that from
* encoders. Index in the output refers to index on a particular encoder.
* Driver uses this index to pass it to encoder when it supports more
* than one output. Userspace applications use index of the array to
* set an output.
*/
static struct vpbe_output dm644xevm_vpbe_outputs[] = {
{
.output = {
.index = 0,
.name = "Composite",
.type = V4L2_OUTPUT_TYPE_ANALOG,
.std = VENC_STD_ALL,
.capabilities = V4L2_OUT_CAP_STD,
},
.subdev_name = VPBE_VENC_SUBDEV_NAME,
.default_mode = "ntsc",
.num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
.modes = dm644xevm_enc_std_timing,
},
{
.output = {
.index = 1,
.name = "Component",
.type = V4L2_OUTPUT_TYPE_ANALOG,
.capabilities = V4L2_OUT_CAP_PRESETS,
},
.subdev_name = VPBE_VENC_SUBDEV_NAME,
.default_mode = "480p59_94",
.num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
.modes = dm644xevm_enc_preset_timing,
},
};
static struct vpbe_config dm644xevm_display_cfg = {
.module_name = "dm644x-vpbe-display",
.i2c_adapter_id = 1,
.osd = {
.module_name = VPBE_OSD_SUBDEV_NAME,
},
.venc = {
.module_name = VPBE_VENC_SUBDEV_NAME,
},
.num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
.outputs = dm644xevm_vpbe_outputs,
};
static struct platform_device *davinci_evm_devices[] __initdata = {
&davinci_fb_device,
&rtc_dev,
......@@ -696,7 +803,7 @@ static __init void davinci_evm_init(void)
evm_init_i2c();
davinci_setup_mmc(0, &dm6446evm_mmc_config);
dm644x_init_video(&dm644xevm_capture_cfg);
dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
davinci_serial_init(&uart_config);
dm644x_init_asp(&dm644x_evm_snd_data);
......
......@@ -29,9 +29,15 @@
#include <media/davinci/vpfe_capture.h>
#include <media/davinci/vpif_types.h>
#include <media/davinci/vpss.h>
#include <media/davinci/vpbe_types.h>
#include <media/davinci/vpbe_venc.h>
#include <media/davinci/vpbe.h>
#include <media/davinci/vpbe_osd.h>
#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
#define SYSMOD_VIDCLKCTL 0x38
#define SYSMOD_VPSS_CLKCTL 0x44
#define SYSMOD_VDD3P3VPWDN 0x48
#define SYSMOD_VSCLKDIS 0x6c
#define SYSMOD_PUPDCTL1 0x7c
......@@ -83,7 +89,7 @@ void dm365_set_vpfe_config(struct vpfe_config *cfg);
/* DM644x function declarations */
void __init dm644x_init(void);
void __init dm644x_init_asp(struct snd_platform_data *pdata);
int __init dm644x_init_video(struct vpfe_config *);
int __init dm644x_init_video(struct vpfe_config *, struct vpbe_config *);
/* DM646x function declarations */
void __init dm646x_init(void);
......
......@@ -627,7 +627,7 @@ static struct resource dm644x_vpfe_resources[] = {
},
};
static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32);
static u64 dm644x_video_dma_mask = DMA_BIT_MASK(32);
static struct resource dm644x_ccdc_resource[] = {
/* CCDC Base address */
{
......@@ -643,7 +643,7 @@ static struct platform_device dm644x_ccdc_dev = {
.num_resources = ARRAY_SIZE(dm644x_ccdc_resource),
.resource = dm644x_ccdc_resource,
.dev = {
.dma_mask = &vpfe_capture_dma_mask,
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
......@@ -654,7 +654,134 @@ static struct platform_device dm644x_vpfe_dev = {
.num_resources = ARRAY_SIZE(dm644x_vpfe_resources),
.resource = dm644x_vpfe_resources,
.dev = {
.dma_mask = &vpfe_capture_dma_mask,
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
#define DM644X_OSD_BASE 0x01c72600
static struct resource dm644x_osd_resources[] = {
{
.start = DM644X_OSD_BASE,
.end = DM644X_OSD_BASE + 0x1ff,
.flags = IORESOURCE_MEM,
},
};
static struct osd_platform_data dm644x_osd_data = {
.vpbe_type = VPBE_VERSION_1,
};
static struct platform_device dm644x_osd_dev = {
.name = VPBE_OSD_SUBDEV_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(dm644x_osd_resources),
.resource = dm644x_osd_resources,
.dev = {
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &dm644x_osd_data,
},
};
#define DM644X_VENC_BASE 0x01c72400
static struct resource dm644x_venc_resources[] = {
{
.start = DM644X_VENC_BASE,
.end = DM644X_VENC_BASE + 0x17f,
.flags = IORESOURCE_MEM,
},
};
#define DM644X_VPSS_MUXSEL_PLL2_MODE BIT(0)
#define DM644X_VPSS_MUXSEL_VPBECLK_MODE BIT(1)
#define DM644X_VPSS_VENCLKEN BIT(3)
#define DM644X_VPSS_DACCLKEN BIT(4)
static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
unsigned int mode)
{
int ret = 0;
u32 v = DM644X_VPSS_VENCLKEN;
switch (type) {
case VPBE_ENC_STD:
v |= DM644X_VPSS_DACCLKEN;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
break;
case VPBE_ENC_DV_PRESET:
switch (mode) {
case V4L2_DV_480P59_94:
case V4L2_DV_576P50:
v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
DM644X_VPSS_DACCLKEN;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
break;
case V4L2_DV_720P60:
case V4L2_DV_1080I60:
case V4L2_DV_1080P30:
/*
* For HD, use external clock source since
* HD requires higher clock rate
*/
v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
break;
default:
ret = -EINVAL;
break;
}
break;
default:
ret = -EINVAL;
}
return ret;
}
static struct resource dm644x_v4l2_disp_resources[] = {
{
.start = IRQ_VENCINT,
.end = IRQ_VENCINT,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device dm644x_vpbe_display = {
.name = "vpbe-v4l2",
.id = -1,
.num_resources = ARRAY_SIZE(dm644x_v4l2_disp_resources),
.resource = dm644x_v4l2_disp_resources,
.dev = {
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
static struct venc_platform_data dm644x_venc_pdata = {
.venc_type = VPBE_VERSION_1,
.setup_clock = dm644x_venc_setup_clock,
};
static struct platform_device dm644x_venc_dev = {
.name = VPBE_VENC_SUBDEV_NAME,
.id = -1,
.num_resources = ARRAY_SIZE(dm644x_venc_resources),
.resource = dm644x_venc_resources,
.dev = {
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &dm644x_venc_pdata,
},
};
static struct platform_device dm644x_vpbe_dev = {
.name = "vpbe_controller",
.id = -1,
.dev = {
.dma_mask = &dm644x_video_dma_mask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
};
......@@ -786,17 +913,30 @@ void __init dm644x_init(void)
davinci_map_sysmod();
}
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg)
int __init dm644x_init_video(struct vpfe_config *vpfe_cfg,
struct vpbe_config *vpbe_cfg)
{
dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
/* Add ccdc clock aliases */
clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL);
clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL);
if (vpfe_cfg || vpbe_cfg)
platform_device_register(&dm644x_vpss_device);
if (vpfe_cfg) {
dm644x_vpfe_dev.dev.platform_data = vpfe_cfg;
platform_device_register(&dm644x_ccdc_dev);
platform_device_register(&dm644x_vpfe_dev);
/* Add ccdc clock aliases */
clk_add_alias("master", dm644x_ccdc_dev.name,
"vpss_master", NULL);
clk_add_alias("slave", dm644x_ccdc_dev.name,
"vpss_slave", NULL);
}
if (vpbe_cfg) {
dm644x_vpbe_dev.dev.platform_data = vpbe_cfg;
platform_device_register(&dm644x_osd_dev);
platform_device_register(&dm644x_venc_dev);
platform_device_register(&dm644x_vpbe_dev);
platform_device_register(&dm644x_vpbe_display);
}
return 0;
}
......
......@@ -159,21 +159,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
.pfn = __phys_to_pfn(EXYNOS4_PA_L2CC),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO1,
.pfn = __phys_to_pfn(EXYNOS4_PA_GPIO1),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO2,
.pfn = __phys_to_pfn(EXYNOS4_PA_GPIO2),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_GPIO3,
.pfn = __phys_to_pfn(EXYNOS4_PA_GPIO3),
.length = SZ_256,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_DMC0,
.pfn = __phys_to_pfn(EXYNOS4_PA_DMC0),
......
This diff is collapsed.
......@@ -101,6 +101,10 @@
#define EXYNOS4_PA_GPIO1 0x11400000
#define EXYNOS4_PA_GPIO2 0x11000000
#define EXYNOS4_PA_GPIO3 0x03860000
#define EXYNOS5_PA_GPIO1 0x11400000
#define EXYNOS5_PA_GPIO2 0x13400000
#define EXYNOS5_PA_GPIO3 0x10D10000
#define EXYNOS5_PA_GPIO4 0x03860000
#define EXYNOS4_PA_MIPI_CSIS0 0x11880000
#define EXYNOS4_PA_MIPI_CSIS1 0x11890000
......
......@@ -182,6 +182,12 @@ static __init int exynos4_pm_init_power_domain(void)
#endif
#ifdef CONFIG_S5P_DEV_CSIS1
exynos_pm_add_dev_to_genpd(&s5p_device_mipi_csis1, &exynos4_pd_cam);
#endif
#ifdef CONFIG_S5P_DEV_G2D
exynos_pm_add_dev_to_genpd(&s5p_device_g2d, &exynos4_pd_lcd0);
#endif
#ifdef CONFIG_S5P_DEV_JPEG
exynos_pm_add_dev_to_genpd(&s5p_device_jpeg, &exynos4_pd_cam);
#endif
return 0;
}
......
......@@ -29,5 +29,30 @@ config ARCH_LPC32XX_UART6_SELECT
endmenu
menu "LPC32XX chip components"
config ARCH_LPC32XX_IRAM_FOR_NET
bool "Use IRAM for network buffers"
default y
help
Say Y here to use the LPC internal fast IRAM (i.e. 256KB SRAM) as
network buffer. If the total combined required buffer sizes is
larger than the size of IRAM, then SDRAM will be used instead.
This can be enabled safely if the IRAM is not intended for other
uses.
config ARCH_LPC32XX_MII_SUPPORT
bool "Check to enable MII support or leave disabled for RMII support"
help
Say Y here to enable MII support, or N for RMII support. Regardless of
which support is selected, the ethernet interface driver needs to be
selected in the device driver networking section.
The PHY3250 reference board uses RMII, so users of this board should
say N.
endmenu
endif
......@@ -87,6 +87,7 @@
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/amba/bus.h>
......@@ -100,6 +101,8 @@
static DEFINE_SPINLOCK(global_clkregs_lock);
static int usb_pll_enable, usb_pll_valid;
static struct clk clk_armpll;
static struct clk clk_usbpll;
......@@ -384,30 +387,62 @@ static u32 local_clk_usbpll_setup(struct clk_pll_setup *pHCLKPllSetup)
static int local_usbpll_enable(struct clk *clk, int enable)
{
u32 reg;
int ret = -ENODEV;
unsigned long timeout = jiffies + msecs_to_jiffies(10);
int ret = 0;
unsigned long timeout = jiffies + msecs_to_jiffies(20);
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
if (enable == 0) {
reg &= ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
LPC32XX_CLKPWR_USBCTRL_CLK_EN2);
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
} else if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP) {
__raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN2 |
LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
LPC32XX_CLKPWR_USB_CTRL);
__raw_writel(reg & ~LPC32XX_CLKPWR_USBCTRL_CLK_EN1,
LPC32XX_CLKPWR_USB_CTRL);
if (enable && usb_pll_valid && usb_pll_enable) {
ret = -ENODEV;
/*
* If the PLL rate has been previously set, then the rate
* in the PLL register is valid and can be enabled here.
* Otherwise, it needs to be enabled as part of setrate.
*/
/*
* Gate clock into PLL
*/
reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
/* Wait for PLL lock */
/*
* Enable PLL
*/
reg |= LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP;
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
/*
* Wait for PLL to lock
*/
while (time_before(jiffies, timeout) && (ret == -ENODEV)) {
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
if (reg & LPC32XX_CLKPWR_USBCTRL_PLL_STS)
ret = 0;
else
udelay(10);
}
/*
* Gate clock from PLL if PLL is locked
*/
if (ret == 0) {
reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
__raw_writel(reg | LPC32XX_CLKPWR_USBCTRL_CLK_EN2,
LPC32XX_CLKPWR_USB_CTRL);
} else {
__raw_writel(reg & ~(LPC32XX_CLKPWR_USBCTRL_CLK_EN1 |
LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP),
LPC32XX_CLKPWR_USB_CTRL);
}
} else if ((enable == 0) && usb_pll_valid && usb_pll_enable) {
usb_pll_valid = 0;
usb_pll_enable = 0;
}
return ret;
......@@ -425,7 +460,7 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
*/
rate = rate * 1000;
clkin = clk->parent->rate;
clkin = clk->get_rate(clk);
usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
clkin = clkin / usbdiv;
......@@ -439,7 +474,8 @@ static unsigned long local_usbpll_round_rate(struct clk *clk,
static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
{
u32 clkin, reg, usbdiv;
int ret = -ENODEV;
u32 clkin, usbdiv;
struct clk_pll_setup pllsetup;
/*
......@@ -448,7 +484,7 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
*/
rate = rate * 1000;
clkin = clk->get_rate(clk);
clkin = clk->get_rate(clk->parent);
usbdiv = (__raw_readl(LPC32XX_CLKPWR_USBCLK_PDIV) &
LPC32XX_CLKPWR_USBPDIV_PLL_MASK) + 1;
clkin = clkin / usbdiv;
......@@ -457,22 +493,25 @@ static int local_usbpll_set_rate(struct clk *clk, unsigned long rate)
if (local_clk_find_pll_cfg(clkin, rate, &pllsetup) == 0)
return -EINVAL;
/*
* Disable PLL clocks during PLL change
*/
local_usbpll_enable(clk, 0);
pllsetup.analog_on = 0;
local_clk_usbpll_setup(&pllsetup);
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN1;
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
/*
* Start USB PLL and check PLL status
*/
pllsetup.analog_on = 1;
local_clk_usbpll_setup(&pllsetup);
usb_pll_valid = 1;
usb_pll_enable = 1;
ret = local_usbpll_enable(clk, 1);
if (ret >= 0)
clk->rate = clk_check_pll_setup(clkin, &pllsetup);
reg = __raw_readl(LPC32XX_CLKPWR_USB_CTRL);
reg |= LPC32XX_CLKPWR_USBCTRL_CLK_EN2;
__raw_writel(reg, LPC32XX_CLKPWR_USB_CTRL);
return 0;
return ret;
}
static struct clk clk_usbpll = {
......
......@@ -159,6 +159,53 @@ struct platform_device lpc32xx_adc_device = {
.resource = adc_resources,
};
/*
* USB support
*/
/* The dmamask must be set for OHCI to work */
static u64 ohci_dmamask = ~(u32) 0;
static struct resource ohci_resources[] = {
{
.start = IO_ADDRESS(LPC32XX_USB_BASE),
.end = IO_ADDRESS(LPC32XX_USB_BASE + 0x100 - 1),
.flags = IORESOURCE_MEM,
}, {
.start = IRQ_LPC32XX_USB_HOST,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device lpc32xx_ohci_device = {
.name = "usb-ohci",
.id = -1,
.dev = {
.dma_mask = &ohci_dmamask,
.coherent_dma_mask = 0xFFFFFFFF,
},
.num_resources = ARRAY_SIZE(ohci_resources),
.resource = ohci_resources,
};
/*
* Network Support
*/
static struct resource net_resources[] = {
[0] = DEFINE_RES_MEM(LPC32XX_ETHERNET_BASE, SZ_4K),
[1] = DEFINE_RES_MEM(LPC32XX_IRAM_BASE, SZ_128K),
[2] = DEFINE_RES_IRQ(IRQ_LPC32XX_ETHERNET),
};
static u64 lpc32xx_mac_dma_mask = 0xffffffffUL;
struct platform_device lpc32xx_net_device = {
.name = "lpc-eth",
.id = 0,
.dev = {
.dma_mask = &lpc32xx_mac_dma_mask,
.coherent_dma_mask = 0xffffffffUL,
},
.num_resources = ARRAY_SIZE(net_resources),
.resource = net_resources,
};
/*
* Returns the unique ID for the device
*/
......
......@@ -19,6 +19,7 @@
#ifndef __LPC32XX_COMMON_H
#define __LPC32XX_COMMON_H
#include <mach/board.h>
#include <linux/platform_device.h>
/*
......@@ -31,6 +32,8 @@ extern struct platform_device lpc32xx_i2c2_device;
extern struct platform_device lpc32xx_tsc_device;
extern struct platform_device lpc32xx_adc_device;
extern struct platform_device lpc32xx_rtc_device;
extern struct platform_device lpc32xx_ohci_device;
extern struct platform_device lpc32xx_net_device;
/*
* Other arch specific structures and functions
......@@ -67,7 +70,6 @@ extern u32 clk_get_pclk_div(void);
extern void lpc32xx_get_uid(u32 devid[4]);
extern u32 lpc32xx_return_iram_size(void);
/*
* Pointers used for sizing and copying suspend function data
*/
......
/*
* arm/arch/mach-lpc32xx/include/mach/board.h
*
* Author: Kevin Wells <kevin.wells@nxp.com>
*
* Copyright (C) 2010 NXP Semiconductors
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __ASM_ARCH_BOARD_H
#define __ASM_ARCH_BOARD_H
extern u32 lpc32xx_return_iram_size(void);
#endif /* __ASM_ARCH_BOARD_H */
......@@ -150,6 +150,10 @@ static const struct lpc32xx_event_info lpc32xx_events[NR_IRQS] = {
.event_group = &lpc32xx_event_int_regs,
.mask = LPC32XX_CLKPWR_INTSRC_KEY_BIT,
},
[IRQ_LPC32XX_ETHERNET] = {
.event_group = &lpc32xx_event_int_regs,
.mask = LPC32XX_CLKPWR_INTSRC_MAC_BIT,
},
[IRQ_LPC32XX_USB_OTG_ATX] = {
.event_group = &lpc32xx_event_int_regs,
.mask = LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT,
......
......@@ -37,6 +37,7 @@
#include <mach/hardware.h>
#include <mach/platform.h>
#include <mach/board.h>
#include <mach/gpio-lpc32xx.h>
#include "common.h"
......@@ -255,6 +256,8 @@ static struct platform_device *phy3250_devs[] __initdata = {
&lpc32xx_watchdog_device,
&lpc32xx_gpio_led_device,
&lpc32xx_adc_device,
&lpc32xx_ohci_device,
&lpc32xx_net_device,
};
static struct amba_device *amba_devs[] __initdata = {
......
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