Commit fff3340f authored by Larry Finger's avatar Larry Finger Committed by Greg Kroah-Hartman

staging: r8188eu: Add files for new driver - part 29

This commit adds files include/rtw_p2p.h, include/rtw_pwrctrl.h,
include/rtw_qos.h, include/rtw_recv.h, and include/rtw_rf.h.
Signed-off-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4218e5be
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTW_P2P_H_
#define __RTW_P2P_H_
#include <drv_types.h>
u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pbuf, u8 *pssid, u8 ussidlen,
u8 *pdev_raddr);
u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pbuf, u8 status_code);
u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf);
u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len, struct sta_info *psta);
u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe);
u8 process_p2p_group_negotation_req(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_group_negotation_resp(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_group_negotation_confirm(struct wifidirect_info *pwdinfo,
u8 *pframe, uint len);
u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe,
uint len);
void p2p_protocol_wk_hdl(struct adapter *padapter, int intcmdtype);
void process_p2p_ps_ie(struct adapter *padapter, u8 *ies, u32 ielength);
void p2p_ps_wk_hdl(struct adapter *padapter, u8 p2p_ps_state);
u8 p2p_ps_wk_cmd(struct adapter *padapter, u8 p2p_ps_state, u8 enqueue);
void reset_global_wifidirect_info(struct adapter *padapter);
int rtw_init_wifi_display_info(struct adapter *padapter);
void rtw_init_wifidirect_timers(struct adapter *padapter);
void rtw_init_wifidirect_addrs(struct adapter *padapter, u8 *dev_addr,
u8 *iface_addr);
void init_wifidirect_info(struct adapter *padapter, enum P2P_ROLE role);
int rtw_p2p_enable(struct adapter *padapter, enum P2P_ROLE role);
static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
if (wdinfo->p2p_state != state)
wdinfo->p2p_state = state;
}
static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
if (wdinfo->pre_p2p_state != state)
wdinfo->pre_p2p_state = state;
}
static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo,
enum P2P_ROLE role)
{
if (wdinfo->role != role)
wdinfo->role = role;
}
static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo)
{
return wdinfo->p2p_state;
}
static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo)
{
return wdinfo->pre_p2p_state;
}
static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo)
{
return wdinfo->role;
}
static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo,
enum P2P_STATE state)
{
return wdinfo->p2p_state == state;
}
static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo,
enum P2P_ROLE role)
{
return wdinfo->role == role;
}
#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state)
#define rtw_p2p_set_pre_state(wdinfo, state) \
_rtw_p2p_set_pre_state(wdinfo, state)
#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role)
#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo)
#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo)
#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo)
#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state)
#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role)
#define rtw_p2p_findphase_ex_set(wdinfo, value) \
((wdinfo)->find_phase_state_exchange_cnt = (value))
/* is this find phase exchange for social channel scan? */
#define rtw_p2p_findphase_ex_is_social(wdinfo) \
((wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST)
/* should we need find phase exchange anymore? */
#define rtw_p2p_findphase_ex_is_needed(wdinfo) \
((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \
(wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE)
#endif
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTW_PWRCTRL_H_
#define __RTW_PWRCTRL_H_
#include <osdep_service.h>
#include <drv_types.h>
#define FW_PWR0 0
#define FW_PWR1 1
#define FW_PWR2 2
#define FW_PWR3 3
#define HW_PWR0 7
#define HW_PWR1 6
#define HW_PWR2 2
#define HW_PWR3 0
#define HW_PWR4 8
#define FW_PWRMSK 0x7
#define XMIT_ALIVE BIT(0)
#define RECV_ALIVE BIT(1)
#define CMD_ALIVE BIT(2)
#define EVT_ALIVE BIT(3)
enum power_mgnt {
PS_MODE_ACTIVE = 0,
PS_MODE_MIN,
PS_MODE_MAX,
PS_MODE_DTIM,
PS_MODE_VOIP,
PS_MODE_UAPSD_WMM,
PS_MODE_UAPSD,
PS_MODE_IBSS,
PS_MODE_WWLAN,
PM_Radio_Off,
PM_Card_Disable,
PS_MODE_NUM
};
/*
BIT[2:0] = HW state
BIT[3] = Protocol PS state, 0: register active state,
1: register sleep state
BIT[4] = sub-state
*/
#define PS_DPS BIT(0)
#define PS_LCLK (PS_DPS)
#define PS_RF_OFF BIT(1)
#define PS_ALL_ON BIT(2)
#define PS_ST_ACTIVE BIT(3)
#define PS_ISR_ENABLE BIT(4)
#define PS_IMR_ENABLE BIT(5)
#define PS_ACK BIT(6)
#define PS_TOGGLE BIT(7)
#define PS_STATE_MASK (0x0F)
#define PS_STATE_HW_MASK (0x07)
#define PS_SEQ_MASK (0xc0)
#define PS_STATE(x) (PS_STATE_MASK & (x))
#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
#define PS_SEQ(x) (PS_SEQ_MASK & (x))
#define PS_STATE_S0 (PS_DPS)
#define PS_STATE_S1 (PS_LCLK)
#define PS_STATE_S2 (PS_RF_OFF)
#define PS_STATE_S3 (PS_ALL_ON)
#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
struct reportpwrstate_parm {
unsigned char mode;
unsigned char state; /* the CPWM value */
unsigned short rsvd;
};
static inline void _init_pwrlock(struct semaphore *plock)
{
_rtw_init_sema(plock, 1);
}
static inline void _free_pwrlock(struct semaphore *plock)
{
_rtw_free_sema(plock);
}
static inline void _enter_pwrlock(struct semaphore *plock)
{
_rtw_down_sema(plock);
}
static inline void _exit_pwrlock(struct semaphore *plock)
{
_rtw_up_sema(plock);
}
#define LPS_DELAY_TIME 1*HZ /* 1 sec */
#define EXE_PWR_NONE 0x01
#define EXE_PWR_IPS 0x02
#define EXE_PWR_LPS 0x04
/* RF state. */
enum rt_rf_power_state {
rf_on, /* RF is on after RFSleep or RFOff */
rf_sleep, /* 802.11 Power Save mode */
rf_off, /* HW/SW Radio OFF or Inactive Power Save */
/* Add the new RF state above this line===== */
rf_max
};
/* RF Off Level for IPS or HW/SW radio off */
#define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-init hw param*/
#define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW*/
#define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock
* Req in initialization. */
#define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R
* if no packet is RX or TX. */
#define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level &= (~(_PS_FLAG)))
#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
(ppsc->cur_ps_level |= _PS_FLAG)
enum _PS_BBRegBackup_ {
PSBBREG_RF0 = 0,
PSBBREG_RF1,
PSBBREG_RF2,
PSBBREG_AFE0,
PSBBREG_TOTALCNT
};
enum { /* for ips_mode */
IPS_NONE = 0,
IPS_NORMAL,
IPS_LEVEL_2,
};
struct pwrctrl_priv {
struct semaphore lock;
volatile u8 rpwm; /* requested power state for fw */
volatile u8 cpwm; /* fw current power state. updated when
* 1. read from HCPWM 2. driver lowers power level */
volatile u8 tog; /* toggling */
volatile u8 cpwm_tog; /* toggling */
u8 pwr_mode;
u8 smart_ps;
u8 bcn_ant_mode;
u32 alives;
struct work_struct cpwm_event;
u8 bpower_saving;
u8 b_hw_radio_off;
u8 reg_rfoff;
u8 reg_pdnmode; /* powerdown mode */
u32 rfoff_reason;
/* RF OFF Level */
u32 cur_ps_level;
u32 reg_rfps_level;
uint ips_enter_cnts;
uint ips_leave_cnts;
u8 ips_mode;
u8 ips_mode_req; /* used to accept the mode setting request,
* will update to ipsmode later */
uint bips_processing;
u32 ips_deny_time; /* will deny IPS when system time less than this */
u8 ps_processing; /* temp used to mark whether in rtw_ps_processor */
u8 bLeisurePs;
u8 LpsIdleCount;
u8 power_mgnt;
u8 bFwCurrentInPSMode;
u32 DelayLPSLastTimeStamp;
u8 btcoex_rfon;
s32 pnp_current_pwr_state;
u8 pnp_bstop_trx;
u8 bInternalAutoSuspend;
u8 bInSuspend;
#ifdef CONFIG_BT_COEXIST
u8 bAutoResume;
u8 autopm_cnt;
#endif
u8 bSupportRemoteWakeup;
struct timer_list pwr_state_check_timer;
int pwr_state_check_interval;
u8 pwr_state_check_cnts;
int ps_flag;
enum rt_rf_power_state rf_pwrstate;/* cur power state */
enum rt_rf_power_state change_rfpwrstate;
u8 wepkeymask;
u8 bHWPowerdown;/* if support hw power down */
u8 bHWPwrPindetect;
u8 bkeepfwalive;
u8 brfoffbyhw;
unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
};
#define rtw_get_ips_mode_req(pwrctrlpriv) \
(pwrctrlpriv)->ips_mode_req
#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
((pwrctrlpriv)->ips_mode_req = (ips_mode))
#define RTW_PWR_STATE_CHK_INTERVAL 2000
#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
do { \
_set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
} while (0)
#define rtw_set_pwr_state_check_timer(pwrctrl) \
_rtw_set_pwr_state_check_timer((pwrctrl), \
(pwrctrl)->pwr_state_check_interval)
void rtw_init_pwrctrl_priv(struct adapter *adapter);
void rtw_free_pwrctrl_priv(struct adapter *adapter);
void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
u8 bcn_ant_mode);
void rtw_set_rpwm(struct adapter *adapter, u8 val8);
void LeaveAllPowerSaveMode(struct adapter *adapter);
void ips_enter(struct adapter *padapter);
int ips_leave(struct adapter *padapter);
void rtw_ps_processor(struct adapter *padapter);
enum rt_rf_power_state RfOnOffDetect(struct adapter *iadapter);
s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
void LPS_Enter(struct adapter *adapter);
void LPS_Leave(struct adapter *adapter);
u8 rtw_interface_ps_func(struct adapter *adapter,
enum hal_intf_ps_func efunc_id, u8 *val);
void rtw_set_ips_deny(struct adapter *adapter, u32 ms);
int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
const char *caller);
#define rtw_pwr_wakeup(adapter) \
_rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
_rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
int rtw_pm_set_ips(struct adapter *adapter, u8 mode);
int rtw_pm_set_lps(struct adapter *adapter, u8 mode);
#endif /* __RTL871X_PWRCTRL_H_ */
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_QOS_H_
#define _RTW_QOS_H_
#include <osdep_service.h>
struct qos_priv {
unsigned int qos_option; /* bit mask option: u-apsd,
* s-apsd, ts, block ack... */
};
#endif /* _RTL871X_QOS_H_ */
/******************************************************************************
*
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef _RTW_RECV_H_
#define _RTW_RECV_H_
#include <osdep_service.h>
#include <drv_types.h>
#define NR_RECVFRAME 256
#define RXFRAME_ALIGN 8
#define RXFRAME_ALIGN_SZ (1<<RXFRAME_ALIGN)
#define MAX_RXFRAME_CNT 512
#define MAX_RX_NUMBLKS (32)
#define RECVFRAME_HDR_ALIGN 128
#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr)
#define MAX_SUBFRAME_COUNT 64
/* for Rx reordering buffer control */
struct recv_reorder_ctrl {
struct adapter *padapter;
u8 enable;
u16 indicate_seq;/* wstart_b, init_value=0xffff */
u16 wend_b;
u8 wsize_b;
struct __queue pending_recvframe_queue;
struct timer_list reordering_ctrl_timer;
};
struct stainfo_rxcache {
u16 tid_rxseq[16];
/*
unsigned short tid0_rxseq;
unsigned short tid1_rxseq;
unsigned short tid2_rxseq;
unsigned short tid3_rxseq;
unsigned short tid4_rxseq;
unsigned short tid5_rxseq;
unsigned short tid6_rxseq;
unsigned short tid7_rxseq;
unsigned short tid8_rxseq;
unsigned short tid9_rxseq;
unsigned short tid10_rxseq;
unsigned short tid11_rxseq;
unsigned short tid12_rxseq;
unsigned short tid13_rxseq;
unsigned short tid14_rxseq;
unsigned short tid15_rxseq;
*/
};
struct smooth_rssi_data {
u32 elements[100]; /* array to store values */
u32 index; /* index to current array to store */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
struct signal_stat {
u8 update_req; /* used to indicate */
u8 avg_val; /* avg of valid elements */
u32 total_num; /* num of valid elements */
u32 total_val; /* sum of valid elements */
};
#define MAX_PATH_NUM_92CS 2
struct phy_info {
u8 RxPWDBAll;
u8 SignalQuality; /* in 0-100 index. */
u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
s8 RxPower; /* in dBm Translate from PWdB */
/* Real power in dBm for this packet, no beautification and aggregation.
* Keep this raw info to be used for the other procedures. */
s8 recvpower;
u8 BTRxRSSIPercentage;
u8 SignalStrength; /* in 0-100 index. */
u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
};
struct rx_pkt_attrib {
u16 pkt_len;
u8 physt;
u8 drvinfo_sz;
u8 shift_sz;
u8 hdrlen; /* the WLAN Header Len */
u8 to_fr_ds;
u8 amsdu;
u8 qos;
u8 priority;
u8 pw_save;
u8 mdata;
u16 seq_num;
u8 frag_num;
u8 mfrag;
u8 order;
u8 privacy; /* in frame_ctrl field */
u8 bdecrypted;
u8 encrypt; /* when 0 indicate no encrypt. when non-zero,
* indicate the encrypt algorith */
u8 iv_len;
u8 icv_len;
u8 crc_err;
u8 icv_err;
u16 eth_type;
u8 dst[ETH_ALEN];
u8 src[ETH_ALEN];
u8 ta[ETH_ALEN];
u8 ra[ETH_ALEN];
u8 bssid[ETH_ALEN];
u8 ack_policy;
u8 key_index;
u8 mcs_rate;
u8 rxht;
u8 sgi;
u8 pkt_rpt_type;
u32 MacIDValidEntry[2]; /* 64 bits present 64 entry. */
struct phy_info phy_info;
};
/* These definition is used for Rx packet reordering. */
#define SN_LESS(a, b) (((a - b) & 0x800) != 0)
#define SN_EQUAL(a, b) (a == b)
#define REORDER_WAIT_TIME (50) /* (ms) */
#define RECVBUFF_ALIGN_SZ 8
#define RXDESC_SIZE 24
#define RXDESC_OFFSET RXDESC_SIZE
struct recv_stat {
__le32 rxdw0;
__le32 rxdw1;
__le32 rxdw2;
__le32 rxdw3;
__le32 rxdw4;
__le32 rxdw5;
};
#define EOR BIT(30)
/*
accesser of recv_priv: rtw_recv_entry(dispatch / passive level);
recv_thread(passive) ; returnpkt(dispatch)
; halt(passive) ;
using enter_critical section to protect
*/
struct recv_priv {
spinlock_t lock;
struct __queue free_recv_queue;
struct __queue recv_pending_queue;
struct __queue uc_swdec_pending_queue;
u8 *pallocated_frame_buf;
u8 *precv_frame_buf;
uint free_recvframe_cnt;
struct adapter *adapter;
u32 bIsAnyNonBEPkts;
u64 rx_bytes;
u64 rx_pkts;
u64 rx_drop;
u64 last_rx_bytes;
uint rx_icv_err;
uint rx_largepacket_crcerr;
uint rx_smallpacket_crcerr;
uint rx_middlepacket_crcerr;
struct semaphore allrxreturnevt;
uint ff_hwaddr;
u8 rx_pending_cnt;
struct tasklet_struct irq_prepare_beacon_tasklet;
struct tasklet_struct recv_tasklet;
struct sk_buff_head free_recv_skb_queue;
struct sk_buff_head rx_skb_queue;
u8 *pallocated_recv_buf;
u8 *precv_buf; /* 4 alignment */
struct __queue free_recv_buf_queue;
u32 free_recv_buf_queue_cnt;
/* For display the phy informatiom */
u8 is_signal_dbg; /* for debug */
u8 signal_strength_dbg; /* for debug */
s8 rssi;
s8 rxpwdb;
u8 signal_strength;
u8 signal_qual;
u8 noise;
int RxSNRdB[2];
s8 RxRssi[2];
int FalseAlmCnt_all;
struct timer_list signal_stat_timer;
u32 signal_stat_sampling_interval;
struct signal_stat signal_qual_data;
struct signal_stat signal_strength_data;
};
#define rtw_set_signal_stat_timer(recvpriv) \
_set_timer(&(recvpriv)->signal_stat_timer, \
(recvpriv)->signal_stat_sampling_interval)
struct sta_recv_priv {
spinlock_t lock;
int option;
struct __queue defrag_q; /* keeping the fragment frame until defrag */
struct stainfo_rxcache rxcache;
};
struct recv_buf {
struct list_head list;
spinlock_t recvbuf_lock;
u32 ref_cnt;
struct adapter *adapter;
u8 *pbuf;
u8 *pallocated_buf;
u32 len;
u8 *phead;
u8 *pdata;
u8 *ptail;
u8 *pend;
struct urb *purb;
dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */
u32 alloc_sz;
u8 irp_pending;
int transfer_len;
struct sk_buff *pskb;
u8 reuse;
};
/*
head ----->
data ----->
payload
tail ----->
end ----->
len = (unsigned int )(tail - data);
*/
struct recv_frame_hdr {
struct list_head list;
struct sk_buff *pkt;
struct sk_buff *pkt_newalloc;
struct adapter *adapter;
u8 fragcnt;
int frame_tag;
struct rx_pkt_attrib attrib;
uint len;
u8 *rx_head;
u8 *rx_data;
u8 *rx_tail;
u8 *rx_end;
void *precvbuf;
struct sta_info *psta;
/* for A-MPDU Rx reordering buffer control */
struct recv_reorder_ctrl *preorder_ctrl;
};
union recv_frame {
union {
struct list_head list;
struct recv_frame_hdr hdr;
uint mem[RECVFRAME_HDR_ALIGN>>2];
} u;
};
union recv_frame *_rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
union recv_frame *rtw_alloc_recvframe(struct __queue *pfree_recv_queue);
void rtw_init_recvframe(union recv_frame *precvframe,
struct recv_priv *precvpriv);
int rtw_free_recvframe(union recv_frame *precvframe,
struct __queue *pfree_recv_queue);
#define rtw_dequeue_recvframe(queue) rtw_alloc_recvframe(queue)
int _rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue);
int rtw_enqueue_recvframe(union recv_frame *precvframe, struct __queue *queue);
void rtw_free_recvframe_queue(struct __queue *pframequeue,
struct __queue *pfree_recv_queue);
u32 rtw_free_uc_swdec_pending_queue(struct adapter *adapter);
int rtw_enqueue_recvbuf_to_head(struct recv_buf *buf, struct __queue *queue);
int rtw_enqueue_recvbuf(struct recv_buf *precvbuf, struct __queue *queue);
struct recv_buf *rtw_dequeue_recvbuf(struct __queue *queue);
void rtw_reordering_ctrl_timeout_handler(void *pcontext);
static inline u8 *get_rxmem(union recv_frame *precvframe)
{
/* always return rx_head... */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_head;
}
static inline u8 *get_rx_status(union recv_frame *precvframe)
{
return get_rxmem(precvframe);
}
static inline u8 *get_recvframe_data(union recv_frame *precvframe)
{
/* always return rx_data */
if (precvframe == NULL)
return NULL;
return precvframe->u.hdr.rx_data;
}
static inline u8 *recvframe_push(union recv_frame *precvframe, int sz)
{
/* append data before rx_data */
/* add data to the start of recv_frame
*
* This function extends the used data area of the recv_frame at the buffer
* start. rx_data must be still larger than rx_head, after pushing.
*/
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data -= sz ;
if (precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head) {
precvframe->u.hdr.rx_data += sz;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_data;
}
static inline u8 *recvframe_pull(union recv_frame *precvframe, int sz)
{
/* rx_data += sz; move rx_data sz bytes hereafter */
/* used for extract sz bytes from rx_data, update rx_data and return
* the updated rx_data to the caller */
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_data += sz;
if (precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) {
precvframe->u.hdr.rx_data -= sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_data;
}
static inline u8 *recvframe_put(union recv_frame *precvframe, int sz)
{
/* used for append sz bytes from ptr to rx_tail, update rx_tail
* and return the updated rx_tail to the caller */
/* after putting, rx_tail must be still larger than rx_end. */
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_tail += sz;
if (precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) {
precvframe->u.hdr.rx_tail -= sz;
return NULL;
}
precvframe->u.hdr.len += sz;
return precvframe->u.hdr.rx_tail;
}
static inline u8 *recvframe_pull_tail(union recv_frame *precvframe, int sz)
{
/* rmv data from rx_tail (by yitsen) */
/* used for extract sz bytes from rx_end, update rx_end and return
* the updated rx_end to the caller */
/* after pulling, rx_end must be still larger than rx_data. */
if (precvframe == NULL)
return NULL;
precvframe->u.hdr.rx_tail -= sz;
if (precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) {
precvframe->u.hdr.rx_tail += sz;
return NULL;
}
precvframe->u.hdr.len -= sz;
return precvframe->u.hdr.rx_tail;
}
static inline unsigned char *get_rxbuf_desc(union recv_frame *precvframe)
{
unsigned char *buf_desc;
if (precvframe == NULL)
return NULL;
return buf_desc;
}
static inline union recv_frame *rxmem_to_recvframe(u8 *rxmem)
{
/* due to the design of 2048 bytes alignment of recv_frame,
* we can reference the union recv_frame */
/* from any given member of recv_frame. */
/* rxmem indicates the any member/address in recv_frame */
return (union recv_frame *)(((size_t)rxmem >> RXFRAME_ALIGN) << RXFRAME_ALIGN);
}
static inline union recv_frame *pkt_to_recvframe(struct sk_buff *pkt)
{
u8 *buf_star;
union recv_frame *precv_frame;
precv_frame = rxmem_to_recvframe((unsigned char *)buf_star);
return precv_frame;
}
static inline u8 *pkt_to_recvmem(struct sk_buff *pkt)
{
/* return the rx_head */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_head;
}
static inline u8 *pkt_to_recvdata(struct sk_buff *pkt)
{
/* return the rx_data */
union recv_frame *precv_frame = pkt_to_recvframe(pkt);
return precv_frame->u.hdr.rx_data;
}
static inline int get_recvframe_len(union recv_frame *precvframe)
{
return precvframe->u.hdr.len;
}
static inline s32 translate_percentage_to_dbm(u32 sig_stren_index)
{
s32 power; /* in dBm. */
/* Translate to dBm (x=0.5y-95). */
power = (s32)((sig_stren_index + 1) >> 1);
power -= 95;
return power;
}
struct sta_info;
void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv);
void mgt_dispatcher(struct adapter *padapter, union recv_frame *precv_frame);
#endif
/******************************************************************************
*
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
*
******************************************************************************/
#ifndef __RTW_RF_H_
#define __RTW_RF_H_
#include <rtw_cmd.h>
#define OFDM_PHY 1
#define MIXED_PHY 2
#define CCK_PHY 3
#define NumRates (13)
/* slot time for 11g */
#define SHORT_SLOT_TIME 9
#define NON_SHORT_SLOT_TIME 20
#define RTL8711_RF_MAX_SENS 6
#define RTL8711_RF_DEF_SENS 4
/* We now define the following channels as the max channels in each
* channel plan. */
/* 2G, total 14 chnls */
/* {1,2,3,4,5,6,7,8,9,10,11,12,13,14} */
#define MAX_CHANNEL_NUM_2G 14
#define MAX_CHANNEL_NUM 14 /* 2.4 GHz only */
#define NUM_REGULATORYS 1
/* Country codes */
#define USA 0x555320
#define EUROPE 0x1 /* temp, should be provided later */
#define JAPAN 0x2 /* temp, should be provided later */
struct regulatory_class {
u32 starting_freq; /* MHz, */
u8 channel_set[MAX_CHANNEL_NUM];
u8 channel_cck_power[MAX_CHANNEL_NUM]; /* dbm */
u8 channel_ofdm_power[MAX_CHANNEL_NUM]; /* dbm */
u8 txpower_limit; /* dbm */
u8 channel_spacing; /* MHz */
u8 modem;
};
enum capability {
cESS = 0x0001,
cIBSS = 0x0002,
cPollable = 0x0004,
cPollReq = 0x0008,
cPrivacy = 0x0010,
cShortPreamble = 0x0020,
cPBCC = 0x0040,
cChannelAgility = 0x0080,
cSpectrumMgnt = 0x0100,
cQos = 0x0200, /* For HCCA, use with CF-Pollable
* and CF-PollReq */
cShortSlotTime = 0x0400,
cAPSD = 0x0800,
cRM = 0x1000, /* RRM (Radio Request Measurement) */
cDSSS_OFDM = 0x2000,
cDelayedBA = 0x4000,
cImmediateBA = 0x8000,
};
enum _REG_PREAMBLE_MODE {
PREAMBLE_LONG = 1,
PREAMBLE_AUTO = 2,
PREAMBLE_SHORT = 3,
};
enum _RTL8712_RF_MIMO_CONFIG_ {
RTL8712_RFCONFIG_1T = 0x10,
RTL8712_RFCONFIG_2T = 0x20,
RTL8712_RFCONFIG_1R = 0x01,
RTL8712_RFCONFIG_2R = 0x02,
RTL8712_RFCONFIG_1T1R = 0x11,
RTL8712_RFCONFIG_1T2R = 0x12,
RTL8712_RFCONFIG_TURBO = 0x92,
RTL8712_RFCONFIG_2T2R = 0x22
};
enum rf90_radio_path {
RF90_PATH_A = 0, /* Radio Path A */
RF90_PATH_B = 1, /* Radio Path B */
RF90_PATH_C = 2, /* Radio Path C */
RF90_PATH_D = 3 /* Radio Path D */
};
/* Bandwidth Offset */
#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
#define HAL_PRIME_CHNL_OFFSET_LOWER 1
#define HAL_PRIME_CHNL_OFFSET_UPPER 2
/* Represent Channel Width in HT Capabilities */
/* */
enum ht_channel_width {
HT_CHANNEL_WIDTH_20 = 0,
HT_CHANNEL_WIDTH_40 = 1,
HT_CHANNEL_WIDTH_80 = 2,
HT_CHANNEL_WIDTH_160 = 3,
HT_CHANNEL_WIDTH_10 = 4,
};
/* */
/* Represent Extention Channel Offset in HT Capabilities */
/* This is available only in 40Mhz mode. */
/* */
enum ht_extchnl_offset {
HT_EXTCHNL_OFFSET_NO_EXT = 0,
HT_EXTCHNL_OFFSET_UPPER = 1,
HT_EXTCHNL_OFFSET_NO_DEF = 2,
HT_EXTCHNL_OFFSET_LOWER = 3,
};
/* 2007/11/15 MH Define different RF type. */
enum rt_rf_type_def {
RF_1T2R = 0,
RF_2T4R = 1,
RF_2T2R = 2,
RF_1T1R = 3,
RF_2T2R_GREEN = 4,
RF_819X_MAX_TYPE = 5,
};
u32 rtw_ch2freq(u32 ch);
u32 rtw_freq2ch(u32 freq);
#endif /* _RTL8711_RF_H_ */
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