iwl3945-base.c 245 KB
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/******************************************************************************
 *
 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
 *
 * Portions of this file are derived from the ipw3945 project, as well
 * as portions of the ieee80211 subsystem header files.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program; if not, write to the Free Software Foundation, Inc.,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 *
 *****************************************************************************/

/*
 * NOTE:  This file (iwl-base.c) is used to build to multiple hardware targets
 * by defining IWL to either 3945 or 4965.  The Makefile used when building
 * the base targets will create base-3945.o and base-4965.o
 *
 * The eventual goal is to move as many of the #if IWL / #endif blocks out of
 * this file and into the hardware specific implementation files (iwl-XXXX.c)
 * and leave only the common (non #ifdef sprinkled) code in this file
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <linux/etherdevice.h>
#include <linux/if_arp.h>

#include <net/ieee80211_radiotap.h>
#include <net/mac80211.h>

#include <asm/div64.h>

#include "iwl-3945.h"
#include "iwl-helpers.h"

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#ifdef CONFIG_IWL3945_DEBUG
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u32 iwl3945_debug_level;
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#endif

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static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
				  struct iwl3945_tx_queue *txq);
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/******************************************************************************
 *
 * module boiler plate
 *
 ******************************************************************************/

/* module parameters */
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static int iwl3945_param_disable_hw_scan;
static int iwl3945_param_debug;
static int iwl3945_param_disable;      /* def: enable radio */
static int iwl3945_param_antenna;      /* def: 0 = both antennas (use diversity) */
int iwl3945_param_hwcrypto;     /* def: using software encryption */
static int iwl3945_param_qos_enable = 1;
int iwl3945_param_queues_num = IWL_MAX_NUM_QUEUES;
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/*
 * module name, copyright, version, etc.
 * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
 */

#define DRV_DESCRIPTION	\
"Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"

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#ifdef CONFIG_IWL3945_DEBUG
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#define VD "d"
#else
#define VD
#endif

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#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
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#define VS "s"
#else
#define VS
#endif

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#define IWLWIFI_VERSION "1.1.19k" VD VS
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#define DRV_COPYRIGHT	"Copyright(c) 2003-2007 Intel Corporation"
#define DRV_VERSION     IWLWIFI_VERSION

/* Change firmware file name, using "-" and incrementing number,
 *   *only* when uCode interface or architecture changes so that it
 *   is not compatible with earlier drivers.
 * This number will also appear in << 8 position of 1st dword of uCode file */
#define IWL3945_UCODE_API "-1"

MODULE_DESCRIPTION(DRV_DESCRIPTION);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR(DRV_COPYRIGHT);
MODULE_LICENSE("GPL");

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static __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
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{
	u16 fc = le16_to_cpu(hdr->frame_control);
	int hdr_len = ieee80211_get_hdrlen(fc);

	if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
		return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
	return NULL;
}

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static const struct ieee80211_hw_mode *iwl3945_get_hw_mode(
		struct iwl3945_priv *priv, int mode)
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{
	int i;

	for (i = 0; i < 3; i++)
		if (priv->modes[i].mode == mode)
			return &priv->modes[i];

	return NULL;
}

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static int iwl3945_is_empty_essid(const char *essid, int essid_len)
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{
	/* Single white space is for Linksys APs */
	if (essid_len == 1 && essid[0] == ' ')
		return 1;

	/* Otherwise, if the entire essid is 0, we assume it is hidden */
	while (essid_len) {
		essid_len--;
		if (essid[essid_len] != '\0')
			return 0;
	}

	return 1;
}

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static const char *iwl3945_escape_essid(const char *essid, u8 essid_len)
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{
	static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
	const char *s = essid;
	char *d = escaped;

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	if (iwl3945_is_empty_essid(essid, essid_len)) {
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		memcpy(escaped, "<hidden>", sizeof("<hidden>"));
		return escaped;
	}

	essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
	while (essid_len--) {
		if (*s == '\0') {
			*d++ = '\\';
			*d++ = '0';
			s++;
		} else
			*d++ = *s++;
	}
	*d = '\0';
	return escaped;
}

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static void iwl3945_print_hex_dump(int level, void *p, u32 len)
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{
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#ifdef CONFIG_IWL3945_DEBUG
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	if (!(iwl3945_debug_level & level))
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		return;

	print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
			p, len, 1);
#endif
}

/*************** DMA-QUEUE-GENERAL-FUNCTIONS  *****
 * DMA services
 *
 * Theory of operation
 *
 * A queue is a circular buffers with 'Read' and 'Write' pointers.
 * 2 empty entries always kept in the buffer to protect from overflow.
 *
 * For Tx queue, there are low mark and high mark limits. If, after queuing
 * the packet for Tx, free space become < low mark, Tx queue stopped. When
 * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
 * Tx queue resumed.
 *
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 * The IWL operates with six queues, one receive queue in the device's
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 * sram, one transmit queue for sending commands to the device firmware,
 * and four transmit queues for data.
 ***************************************************/

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static int iwl3945_queue_space(const struct iwl3945_queue *q)
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{
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	int s = q->read_ptr - q->write_ptr;
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	if (q->read_ptr > q->write_ptr)
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		s -= q->n_bd;

	if (s <= 0)
		s += q->n_window;
	/* keep some reserve to not confuse empty and full situations */
	s -= 2;
	if (s < 0)
		s = 0;
	return s;
}

/* XXX: n_bd must be power-of-two size */
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static inline int iwl3945_queue_inc_wrap(int index, int n_bd)
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{
	return ++index & (n_bd - 1);
}

/* XXX: n_bd must be power-of-two size */
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static inline int iwl3945_queue_dec_wrap(int index, int n_bd)
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{
	return --index & (n_bd - 1);
}

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static inline int x2_queue_used(const struct iwl3945_queue *q, int i)
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{
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	return q->write_ptr > q->read_ptr ?
		(i >= q->read_ptr && i < q->write_ptr) :
		!(i < q->read_ptr && i >= q->write_ptr);
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}

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static inline u8 get_cmd_index(struct iwl3945_queue *q, u32 index, int is_huge)
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{
	if (is_huge)
		return q->n_window;

	return index & (q->n_window - 1);
}

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static int iwl3945_queue_init(struct iwl3945_priv *priv, struct iwl3945_queue *q,
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			  int count, int slots_num, u32 id)
{
	q->n_bd = count;
	q->n_window = slots_num;
	q->id = id;

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	/* count must be power-of-two size, otherwise iwl3945_queue_inc_wrap
	 * and iwl3945_queue_dec_wrap are broken. */
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	BUG_ON(!is_power_of_2(count));

	/* slots_num must be power-of-two size, otherwise
	 * get_cmd_index is broken. */
	BUG_ON(!is_power_of_2(slots_num));

	q->low_mark = q->n_window / 4;
	if (q->low_mark < 4)
		q->low_mark = 4;

	q->high_mark = q->n_window / 8;
	if (q->high_mark < 2)
		q->high_mark = 2;

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	q->write_ptr = q->read_ptr = 0;
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	return 0;
}

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static int iwl3945_tx_queue_alloc(struct iwl3945_priv *priv,
			      struct iwl3945_tx_queue *txq, u32 id)
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{
	struct pci_dev *dev = priv->pci_dev;

	if (id != IWL_CMD_QUEUE_NUM) {
		txq->txb = kmalloc(sizeof(txq->txb[0]) *
				   TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
		if (!txq->txb) {
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			IWL_ERROR("kmalloc for auxiliary BD "
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				  "structures failed\n");
			goto error;
		}
	} else
		txq->txb = NULL;

	txq->bd = pci_alloc_consistent(dev,
			sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
			&txq->q.dma_addr);

	if (!txq->bd) {
		IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
			  sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
		goto error;
	}
	txq->q.id = id;

	return 0;

 error:
	if (txq->txb) {
		kfree(txq->txb);
		txq->txb = NULL;
	}

	return -ENOMEM;
}

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int iwl3945_tx_queue_init(struct iwl3945_priv *priv,
		      struct iwl3945_tx_queue *txq, int slots_num, u32 txq_id)
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{
	struct pci_dev *dev = priv->pci_dev;
	int len;
	int rc = 0;

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	/* allocate command space + one big command for scan since scan
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	 * command is very huge the system will not have two scan at the
	 * same time */
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	len = sizeof(struct iwl3945_cmd) * slots_num;
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	if (txq_id == IWL_CMD_QUEUE_NUM)
		len +=  IWL_MAX_SCAN_SIZE;
	txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
	if (!txq->cmd)
		return -ENOMEM;

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	rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
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	if (rc) {
		pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);

		return -ENOMEM;
	}
	txq->need_update = 0;

	/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
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	 * iwl3945_queue_inc_wrap and iwl3945_queue_dec_wrap are broken. */
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	BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
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	iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
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	iwl3945_hw_tx_queue_init(priv, txq);
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	return 0;
}

/**
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 * iwl3945_tx_queue_free - Deallocate DMA queue.
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 * @txq: Transmit queue to deallocate.
 *
 * Empty queue by removing and destroying all BD's.
 * Free all buffers.  txq itself is not freed.
 *
 */
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void iwl3945_tx_queue_free(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
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{
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	struct iwl3945_queue *q = &txq->q;
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	struct pci_dev *dev = priv->pci_dev;
	int len;

	if (q->n_bd == 0)
		return;

	/* first, empty all BD's */
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	for (; q->write_ptr != q->read_ptr;
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	     q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd))
		iwl3945_hw_txq_free_tfd(priv, txq);
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	len = sizeof(struct iwl3945_cmd) * q->n_window;
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	if (q->id == IWL_CMD_QUEUE_NUM)
		len += IWL_MAX_SCAN_SIZE;

	pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);

	/* free buffers belonging to queue itself */
	if (txq->q.n_bd)
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		pci_free_consistent(dev, sizeof(struct iwl3945_tfd_frame) *
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				    txq->q.n_bd, txq->bd, txq->q.dma_addr);

	if (txq->txb) {
		kfree(txq->txb);
		txq->txb = NULL;
	}

	/* 0 fill whole structure */
	memset(txq, 0, sizeof(*txq));
}

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const u8 iwl3945_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
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/*************** STATION TABLE MANAGEMENT ****
 *
 * NOTE:  This needs to be overhauled to better synchronize between
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 * how the iwl-4965.c is using iwl3945_hw_find_station vs. iwl-3945.c
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 *
 * mac80211 should also be examined to determine if sta_info is duplicating
 * the functionality provided here
 */

/**************************************************************/
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#if 0 /* temporary disable till we add real remove station */
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static u8 iwl3945_remove_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap)
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{
	int index = IWL_INVALID_STATION;
	int i;
	unsigned long flags;

	spin_lock_irqsave(&priv->sta_lock, flags);

	if (is_ap)
		index = IWL_AP_ID;
	else if (is_broadcast_ether_addr(addr))
		index = priv->hw_setting.bcast_sta_id;
	else
		for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
			if (priv->stations[i].used &&
			    !compare_ether_addr(priv->stations[i].sta.sta.addr,
						addr)) {
				index = i;
				break;
			}

	if (unlikely(index == IWL_INVALID_STATION))
		goto out;

	if (priv->stations[index].used) {
		priv->stations[index].used = 0;
		priv->num_stations--;
	}

	BUG_ON(priv->num_stations < 0);

out:
	spin_unlock_irqrestore(&priv->sta_lock, flags);
	return 0;
}
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#endif
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static void iwl3945_clear_stations_table(struct iwl3945_priv *priv)
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{
	unsigned long flags;

	spin_lock_irqsave(&priv->sta_lock, flags);

	priv->num_stations = 0;
	memset(priv->stations, 0, sizeof(priv->stations));

	spin_unlock_irqrestore(&priv->sta_lock, flags);
}


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u8 iwl3945_add_station(struct iwl3945_priv *priv, const u8 *addr, int is_ap, u8 flags)
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{
	int i;
	int index = IWL_INVALID_STATION;
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	struct iwl3945_station_entry *station;
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	unsigned long flags_spin;
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	DECLARE_MAC_BUF(mac);
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	u8 rate;
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	spin_lock_irqsave(&priv->sta_lock, flags_spin);
	if (is_ap)
		index = IWL_AP_ID;
	else if (is_broadcast_ether_addr(addr))
		index = priv->hw_setting.bcast_sta_id;
	else
		for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
			if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
						addr)) {
				index = i;
				break;
			}

			if (!priv->stations[i].used &&
			    index == IWL_INVALID_STATION)
				index = i;
		}

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	/* These two conditions has the same outcome but keep them separate
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	  since they have different meaning */
	if (unlikely(index == IWL_INVALID_STATION)) {
		spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
		return index;
	}

	if (priv->stations[index].used &&
	   !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
		spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
		return index;
	}

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	IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
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	station = &priv->stations[index];
	station->used = 1;
	priv->num_stations++;

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	memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
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	memcpy(station->sta.sta.addr, addr, ETH_ALEN);
	station->sta.mode = 0;
	station->sta.sta.sta_id = index;
	station->sta.station_flags = 0;

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	if (priv->phymode == MODE_IEEE80211A)
		rate = IWL_RATE_6M_PLCP;
	else
		rate =	IWL_RATE_1M_PLCP;
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	/* Turn on both antennas for the station... */
	station->sta.rate_n_flags =
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			iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
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	station->current_rate.rate_n_flags =
			le16_to_cpu(station->sta.rate_n_flags);

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	spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
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	iwl3945_send_add_station(priv, &station->sta, flags);
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	return index;

}

/*************** DRIVER STATUS FUNCTIONS   *****/

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static inline int iwl3945_is_ready(struct iwl3945_priv *priv)
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{
	/* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
	 * set but EXIT_PENDING is not */
	return test_bit(STATUS_READY, &priv->status) &&
	       test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
	       !test_bit(STATUS_EXIT_PENDING, &priv->status);
}

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static inline int iwl3945_is_alive(struct iwl3945_priv *priv)
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{
	return test_bit(STATUS_ALIVE, &priv->status);
}

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static inline int iwl3945_is_init(struct iwl3945_priv *priv)
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{
	return test_bit(STATUS_INIT, &priv->status);
}

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static inline int iwl3945_is_rfkill(struct iwl3945_priv *priv)
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{
	return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
	       test_bit(STATUS_RF_KILL_SW, &priv->status);
}

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static inline int iwl3945_is_ready_rf(struct iwl3945_priv *priv)
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{

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	if (iwl3945_is_rfkill(priv))
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		return 0;

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	return iwl3945_is_ready(priv);
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}

/*************** HOST COMMAND QUEUE FUNCTIONS   *****/

#define IWL_CMD(x) case x : return #x

static const char *get_cmd_string(u8 cmd)
{
	switch (cmd) {
		IWL_CMD(REPLY_ALIVE);
		IWL_CMD(REPLY_ERROR);
		IWL_CMD(REPLY_RXON);
		IWL_CMD(REPLY_RXON_ASSOC);
		IWL_CMD(REPLY_QOS_PARAM);
		IWL_CMD(REPLY_RXON_TIMING);
		IWL_CMD(REPLY_ADD_STA);
		IWL_CMD(REPLY_REMOVE_STA);
		IWL_CMD(REPLY_REMOVE_ALL_STA);
		IWL_CMD(REPLY_3945_RX);
		IWL_CMD(REPLY_TX);
		IWL_CMD(REPLY_RATE_SCALE);
		IWL_CMD(REPLY_LEDS_CMD);
		IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
		IWL_CMD(RADAR_NOTIFICATION);
		IWL_CMD(REPLY_QUIET_CMD);
		IWL_CMD(REPLY_CHANNEL_SWITCH);
		IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
		IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
		IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
		IWL_CMD(POWER_TABLE_CMD);
		IWL_CMD(PM_SLEEP_NOTIFICATION);
		IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
		IWL_CMD(REPLY_SCAN_CMD);
		IWL_CMD(REPLY_SCAN_ABORT_CMD);
		IWL_CMD(SCAN_START_NOTIFICATION);
		IWL_CMD(SCAN_RESULTS_NOTIFICATION);
		IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
		IWL_CMD(BEACON_NOTIFICATION);
		IWL_CMD(REPLY_TX_BEACON);
		IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
		IWL_CMD(QUIET_NOTIFICATION);
		IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
		IWL_CMD(MEASURE_ABORT_NOTIFICATION);
		IWL_CMD(REPLY_BT_CONFIG);
		IWL_CMD(REPLY_STATISTICS_CMD);
		IWL_CMD(STATISTICS_NOTIFICATION);
		IWL_CMD(REPLY_CARD_STATE_CMD);
		IWL_CMD(CARD_STATE_NOTIFICATION);
		IWL_CMD(MISSED_BEACONS_NOTIFICATION);
	default:
		return "UNKNOWN";

	}
}

#define HOST_COMPLETE_TIMEOUT (HZ / 2)

/**
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 * iwl3945_enqueue_hcmd - enqueue a uCode command
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 * @priv: device private data point
 * @cmd: a point to the ucode command structure
 *
 * The function returns < 0 values to indicate the operation is
 * failed. On success, it turns the index (> 0) of command in the
 * command queue.
 */
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static int iwl3945_enqueue_hcmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
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{
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	struct iwl3945_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
	struct iwl3945_queue *q = &txq->q;
	struct iwl3945_tfd_frame *tfd;
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	u32 *control_flags;
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	struct iwl3945_cmd *out_cmd;
633 634 635 636 637 638 639 640 641 642 643 644 645 646
	u32 idx;
	u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
	dma_addr_t phys_addr;
	int pad;
	u16 count;
	int ret;
	unsigned long flags;

	/* If any of the command structures end up being larger than
	 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
	 * we will need to increase the size of the TFD entries */
	BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
	       !(cmd->meta.flags & CMD_SIZE_HUGE));

647
	if (iwl3945_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
648 649 650 651 652 653
		IWL_ERROR("No space for Tx\n");
		return -ENOSPC;
	}

	spin_lock_irqsave(&priv->hcmd_lock, flags);

654
	tfd = &txq->bd[q->write_ptr];
655 656 657 658
	memset(tfd, 0, sizeof(*tfd));

	control_flags = (u32 *) tfd;

659
	idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
660 661 662 663 664 665 666 667 668 669 670
	out_cmd = &txq->cmd[idx];

	out_cmd->hdr.cmd = cmd->id;
	memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
	memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);

	/* At this point, the out_cmd now has all of the incoming cmd
	 * information */

	out_cmd->hdr.flags = 0;
	out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
671
			INDEX_TO_SEQ(q->write_ptr));
672 673 674 675
	if (out_cmd->meta.flags & CMD_SIZE_HUGE)
		out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);

	phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
676 677
			offsetof(struct iwl3945_cmd, hdr);
	iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
678 679 680 681 682 683 684 685 686

	pad = U32_PAD(cmd->len);
	count = TFD_CTL_COUNT_GET(*control_flags);
	*control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);

	IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
		     "%d bytes at %d[%d]:%d\n",
		     get_cmd_string(out_cmd->hdr.cmd),
		     out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
687
		     fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
688 689

	txq->need_update = 1;
690 691
	q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
	ret = iwl3945_tx_queue_update_write_ptr(priv, txq);
692 693 694 695 696

	spin_unlock_irqrestore(&priv->hcmd_lock, flags);
	return ret ? ret : idx;
}

697
static int iwl3945_send_cmd_async(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
698 699 700 701 702 703 704 705 706 707 708 709 710 711
{
	int ret;

	BUG_ON(!(cmd->meta.flags & CMD_ASYNC));

	/* An asynchronous command can not expect an SKB to be set. */
	BUG_ON(cmd->meta.flags & CMD_WANT_SKB);

	/* An asynchronous command MUST have a callback. */
	BUG_ON(!cmd->meta.u.callback);

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return -EBUSY;

712
	ret = iwl3945_enqueue_hcmd(priv, cmd);
713
	if (ret < 0) {
714
		IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
715 716 717 718 719 720
			  get_cmd_string(cmd->id), ret);
		return ret;
	}
	return 0;
}

721
static int iwl3945_send_cmd_sync(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742
{
	int cmd_idx;
	int ret;
	static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */

	BUG_ON(cmd->meta.flags & CMD_ASYNC);

	 /* A synchronous command can not have a callback set. */
	BUG_ON(cmd->meta.u.callback != NULL);

	if (atomic_xchg(&entry, 1)) {
		IWL_ERROR("Error sending %s: Already sending a host command\n",
			  get_cmd_string(cmd->id));
		return -EBUSY;
	}

	set_bit(STATUS_HCMD_ACTIVE, &priv->status);

	if (cmd->meta.flags & CMD_WANT_SKB)
		cmd->meta.source = &cmd->meta;

743
	cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
744 745
	if (cmd_idx < 0) {
		ret = cmd_idx;
746
		IWL_ERROR("Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789
			  get_cmd_string(cmd->id), ret);
		goto out;
	}

	ret = wait_event_interruptible_timeout(priv->wait_command_queue,
			!test_bit(STATUS_HCMD_ACTIVE, &priv->status),
			HOST_COMPLETE_TIMEOUT);
	if (!ret) {
		if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
			IWL_ERROR("Error sending %s: time out after %dms.\n",
				  get_cmd_string(cmd->id),
				  jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));

			clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
			ret = -ETIMEDOUT;
			goto cancel;
		}
	}

	if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
		IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
			       get_cmd_string(cmd->id));
		ret = -ECANCELED;
		goto fail;
	}
	if (test_bit(STATUS_FW_ERROR, &priv->status)) {
		IWL_DEBUG_INFO("Command %s failed: FW Error\n",
			       get_cmd_string(cmd->id));
		ret = -EIO;
		goto fail;
	}
	if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
		IWL_ERROR("Error: Response NULL in '%s'\n",
			  get_cmd_string(cmd->id));
		ret = -EIO;
		goto out;
	}

	ret = 0;
	goto out;

cancel:
	if (cmd->meta.flags & CMD_WANT_SKB) {
790
		struct iwl3945_cmd *qcmd;
791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808

		/* Cancel the CMD_WANT_SKB flag for the cmd in the
		 * TX cmd queue. Otherwise in case the cmd comes
		 * in later, it will possibly set an invalid
		 * address (cmd->meta.source). */
		qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
		qcmd->meta.flags &= ~CMD_WANT_SKB;
	}
fail:
	if (cmd->meta.u.skb) {
		dev_kfree_skb_any(cmd->meta.u.skb);
		cmd->meta.u.skb = NULL;
	}
out:
	atomic_set(&entry, 0);
	return ret;
}

809
int iwl3945_send_cmd(struct iwl3945_priv *priv, struct iwl3945_host_cmd *cmd)
810 811
{
	if (cmd->meta.flags & CMD_ASYNC)
812
		return iwl3945_send_cmd_async(priv, cmd);
813

814
	return iwl3945_send_cmd_sync(priv, cmd);
815 816
}

817
int iwl3945_send_cmd_pdu(struct iwl3945_priv *priv, u8 id, u16 len, const void *data)
818
{
819
	struct iwl3945_host_cmd cmd = {
820 821 822 823 824
		.id = id,
		.len = len,
		.data = data,
	};

825
	return iwl3945_send_cmd_sync(priv, &cmd);
826 827
}

828
static int __must_check iwl3945_send_cmd_u32(struct iwl3945_priv *priv, u8 id, u32 val)
829
{
830
	struct iwl3945_host_cmd cmd = {
831 832 833 834 835
		.id = id,
		.len = sizeof(val),
		.data = &val,
	};

836
	return iwl3945_send_cmd_sync(priv, &cmd);
837 838
}

839
int iwl3945_send_statistics_request(struct iwl3945_priv *priv)
840
{
841
	return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
842 843 844
}

/**
845
 * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
846 847 848 849 850 851 852 853
 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
 * @channel: Any channel valid for the requested phymode

 * In addition to setting the staging RXON, priv->phymode is also set.
 *
 * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
 * in the staging RXON flag structure based on the phymode
 */
854
static int iwl3945_set_rxon_channel(struct iwl3945_priv *priv, u8 phymode, u16 channel)
855
{
856
	if (!iwl3945_get_channel_info(priv, phymode, channel)) {
857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879
		IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
			       channel, phymode);
		return -EINVAL;
	}

	if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
	    (priv->phymode == phymode))
		return 0;

	priv->staging_rxon.channel = cpu_to_le16(channel);
	if (phymode == MODE_IEEE80211A)
		priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
	else
		priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;

	priv->phymode = phymode;

	IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);

	return 0;
}

/**
880
 * iwl3945_check_rxon_cmd - validate RXON structure is valid
881 882 883 884 885
 *
 * NOTE:  This is really only useful during development and can eventually
 * be #ifdef'd out once the driver is stable and folks aren't actively
 * making changes
 */
886
static int iwl3945_check_rxon_cmd(struct iwl3945_rxon_cmd *rxon)
887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951
{
	int error = 0;
	int counter = 1;

	if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
		error |= le32_to_cpu(rxon->flags &
				(RXON_FLG_TGJ_NARROW_BAND_MSK |
				 RXON_FLG_RADAR_DETECT_MSK));
		if (error)
			IWL_WARNING("check 24G fields %d | %d\n",
				    counter++, error);
	} else {
		error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
				0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
		if (error)
			IWL_WARNING("check 52 fields %d | %d\n",
				    counter++, error);
		error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
		if (error)
			IWL_WARNING("check 52 CCK %d | %d\n",
				    counter++, error);
	}
	error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
	if (error)
		IWL_WARNING("check mac addr %d | %d\n", counter++, error);

	/* make sure basic rates 6Mbps and 1Mbps are supported */
	error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
		  ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
	if (error)
		IWL_WARNING("check basic rate %d | %d\n", counter++, error);

	error |= (le16_to_cpu(rxon->assoc_id) > 2007);
	if (error)
		IWL_WARNING("check assoc id %d | %d\n", counter++, error);

	error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
			== (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
	if (error)
		IWL_WARNING("check CCK and short slot %d | %d\n",
			    counter++, error);

	error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
			== (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
	if (error)
		IWL_WARNING("check CCK & auto detect %d | %d\n",
			    counter++, error);

	error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
			RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
	if (error)
		IWL_WARNING("check TGG and auto detect %d | %d\n",
			    counter++, error);

	if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
		error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
				RXON_FLG_ANT_A_MSK)) == 0);
	if (error)
		IWL_WARNING("check antenna %d %d\n", counter++, error);

	if (error)
		IWL_WARNING("Tuning to channel %d\n",
			    le16_to_cpu(rxon->channel));

	if (error) {
952
		IWL_ERROR("Not a valid iwl3945_rxon_assoc_cmd field values\n");
953 954 955 956 957 958
		return -1;
	}
	return 0;
}

/**
959
 * iwl3945_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
960
 * @priv: staging_rxon is compared to active_rxon
961 962 963 964 965
 *
 * If the RXON structure is changing sufficient to require a new
 * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
 * to indicate a new tune is required.
 */
966
static int iwl3945_full_rxon_required(struct iwl3945_priv *priv)
967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000
{

	/* These items are only settable from the full RXON command */
	if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
	    compare_ether_addr(priv->staging_rxon.bssid_addr,
			       priv->active_rxon.bssid_addr) ||
	    compare_ether_addr(priv->staging_rxon.node_addr,
			       priv->active_rxon.node_addr) ||
	    compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
			       priv->active_rxon.wlap_bssid_addr) ||
	    (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
	    (priv->staging_rxon.channel != priv->active_rxon.channel) ||
	    (priv->staging_rxon.air_propagation !=
	     priv->active_rxon.air_propagation) ||
	    (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
		return 1;

	/* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
	 * be updated with the RXON_ASSOC command -- however only some
	 * flag transitions are allowed using RXON_ASSOC */

	/* Check if we are not switching bands */
	if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
	    (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
		return 1;

	/* Check if we are switching association toggle */
	if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
		(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
		return 1;

	return 0;
}

1001
static int iwl3945_send_rxon_assoc(struct iwl3945_priv *priv)
1002 1003
{
	int rc = 0;
1004 1005 1006
	struct iwl3945_rx_packet *res = NULL;
	struct iwl3945_rxon_assoc_cmd rxon_assoc;
	struct iwl3945_host_cmd cmd = {
1007 1008 1009 1010 1011
		.id = REPLY_RXON_ASSOC,
		.len = sizeof(rxon_assoc),
		.meta.flags = CMD_WANT_SKB,
		.data = &rxon_assoc,
	};
1012 1013
	const struct iwl3945_rxon_cmd *rxon1 = &priv->staging_rxon;
	const struct iwl3945_rxon_cmd *rxon2 = &priv->active_rxon;
1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028

	if ((rxon1->flags == rxon2->flags) &&
	    (rxon1->filter_flags == rxon2->filter_flags) &&
	    (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
	    (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
		IWL_DEBUG_INFO("Using current RXON_ASSOC.  Not resending.\n");
		return 0;
	}

	rxon_assoc.flags = priv->staging_rxon.flags;
	rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
	rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
	rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
	rxon_assoc.reserved = 0;

1029
	rc = iwl3945_send_cmd_sync(priv, &cmd);
1030 1031 1032
	if (rc)
		return rc;

1033
	res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045
	if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
		IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
		rc = -EIO;
	}

	priv->alloc_rxb_skb--;
	dev_kfree_skb_any(cmd.meta.u.skb);

	return rc;
}

/**
1046
 * iwl3945_commit_rxon - commit staging_rxon to hardware
1047
 *
1048
 * The RXON command in staging_rxon is committed to the hardware and
1049 1050 1051 1052
 * the active_rxon structure is updated with the new data.  This
 * function correctly transitions out of the RXON_ASSOC_MSK state if
 * a HW tune is required based on the RXON structure changes.
 */
1053
static int iwl3945_commit_rxon(struct iwl3945_priv *priv)
1054 1055
{
	/* cast away the const for active_rxon in this function */
1056
	struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
1057
	int rc = 0;
1058
	DECLARE_MAC_BUF(mac);
1059

1060
	if (!iwl3945_is_alive(priv))
1061 1062 1063 1064 1065 1066 1067 1068 1069 1070
		return -1;

	/* always get timestamp with Rx frame */
	priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;

	/* select antenna */
	priv->staging_rxon.flags &=
	    ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
	priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);

1071
	rc = iwl3945_check_rxon_cmd(&priv->staging_rxon);
1072 1073 1074 1075 1076 1077
	if (rc) {
		IWL_ERROR("Invalid RXON configuration.  Not committing.\n");
		return -EINVAL;
	}

	/* If we don't need to send a full RXON, we can use
1078
	 * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
1079
	 * and other flags for the current radio configuration. */
1080 1081
	if (!iwl3945_full_rxon_required(priv)) {
		rc = iwl3945_send_rxon_assoc(priv);
1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096
		if (rc) {
			IWL_ERROR("Error setting RXON_ASSOC "
				  "configuration (%d).\n", rc);
			return rc;
		}

		memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));

		return 0;
	}

	/* If we are currently associated and the new config requires
	 * an RXON_ASSOC and the new config wants the associated mask enabled,
	 * we must clear the associated from the active configuration
	 * before we apply the new config */
1097
	if (iwl3945_is_associated(priv) &&
1098 1099 1100 1101
	    (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
		IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;

1102 1103
		rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
				      sizeof(struct iwl3945_rxon_cmd),
1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118
				      &priv->active_rxon);

		/* If the mask clearing failed then we set
		 * active_rxon back to what it was previously */
		if (rc) {
			active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
			IWL_ERROR("Error clearing ASSOC_MSK on current "
				  "configuration (%d).\n", rc);
			return rc;
		}
	}

	IWL_DEBUG_INFO("Sending RXON\n"
		       "* with%s RXON_FILTER_ASSOC_MSK\n"
		       "* channel = %d\n"
1119
		       "* bssid = %s\n",
1120 1121 1122
		       ((priv->staging_rxon.filter_flags &
			 RXON_FILTER_ASSOC_MSK) ? "" : "out"),
		       le16_to_cpu(priv->staging_rxon.channel),
1123
		       print_mac(mac, priv->staging_rxon.bssid_addr));
1124 1125

	/* Apply the new configuration */
1126 1127
	rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
			      sizeof(struct iwl3945_rxon_cmd), &priv->staging_rxon);
1128 1129 1130 1131 1132 1133 1134
	if (rc) {
		IWL_ERROR("Error setting new configuration (%d).\n", rc);
		return rc;
	}

	memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));

1135
	iwl3945_clear_stations_table(priv);
1136

1137 1138
	/* If we issue a new RXON command which required a tune then we must
	 * send a new TXPOWER command or we won't be able to Tx any frames */
1139
	rc = iwl3945_hw_reg_send_txpower(priv);
1140 1141 1142 1143 1144 1145
	if (rc) {
		IWL_ERROR("Error setting Tx power (%d).\n", rc);
		return rc;
	}

	/* Add the broadcast address so we can send broadcast frames */
1146
	if (iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0) ==
1147 1148 1149 1150 1151 1152 1153
	    IWL_INVALID_STATION) {
		IWL_ERROR("Error adding BROADCAST address for transmit.\n");
		return -EIO;
	}

	/* If we have set the ASSOC_MSK and we are in BSS mode then
	 * add the IWL_AP_ID to the station rate table */
1154
	if (iwl3945_is_associated(priv) &&
1155
	    (priv->iw_mode == IEEE80211_IF_TYPE_STA))
1156
		if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172
		    == IWL_INVALID_STATION) {
			IWL_ERROR("Error adding AP address for transmit.\n");
			return -EIO;
		}

	/* Init the hardware's rate fallback order based on the
	 * phymode */
	rc = iwl3945_init_hw_rate_table(priv);
	if (rc) {
		IWL_ERROR("Error setting HW rate table: %02X\n", rc);
		return -EIO;
	}

	return 0;
}

1173
static int iwl3945_send_bt_config(struct iwl3945_priv *priv)
1174
{
1175
	struct iwl3945_bt_cmd bt_cmd = {
1176 1177 1178 1179 1180 1181 1182
		.flags = 3,
		.lead_time = 0xAA,
		.max_kill = 1,
		.kill_ack_mask = 0,
		.kill_cts_mask = 0,
	};

1183 1184
	return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
				sizeof(struct iwl3945_bt_cmd), &bt_cmd);
1185 1186
}

1187
static int iwl3945_send_scan_abort(struct iwl3945_priv *priv)
1188 1189
{
	int rc = 0;
1190 1191
	struct iwl3945_rx_packet *res;
	struct iwl3945_host_cmd cmd = {
1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203
		.id = REPLY_SCAN_ABORT_CMD,
		.meta.flags = CMD_WANT_SKB,
	};

	/* If there isn't a scan actively going on in the hardware
	 * then we are in between scan bands and not actually
	 * actively scanning, so don't send the abort command */
	if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
		clear_bit(STATUS_SCAN_ABORTING, &priv->status);
		return 0;
	}

1204
	rc = iwl3945_send_cmd_sync(priv, &cmd);
1205 1206 1207 1208 1209
	if (rc) {
		clear_bit(STATUS_SCAN_ABORTING, &priv->status);
		return rc;
	}

1210
	res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227
	if (res->u.status != CAN_ABORT_STATUS) {
		/* The scan abort will return 1 for success or
		 * 2 for "failure".  A failure condition can be
		 * due to simply not being in an active scan which
		 * can occur if we send the scan abort before we
		 * the microcode has notified us that a scan is
		 * completed. */
		IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
		clear_bit(STATUS_SCAN_ABORTING, &priv->status);
		clear_bit(STATUS_SCAN_HW, &priv->status);
	}

	dev_kfree_skb_any(cmd.meta.u.skb);

	return rc;
}

1228 1229
static int iwl3945_card_state_sync_callback(struct iwl3945_priv *priv,
					struct iwl3945_cmd *cmd,
1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244
					struct sk_buff *skb)
{
	return 1;
}

/*
 * CARD_STATE_CMD
 *
 * Use: Sets the internal card state to enable, disable, or halt
 *
 * When in the 'enable' state the card operates as normal.
 * When in the 'disable' state, the card enters into a low power mode.
 * When in the 'halt' state, the card is shut down and must be fully
 * restarted to come back on.
 */
1245
static int iwl3945_send_card_state(struct iwl3945_priv *priv, u32 flags, u8 meta_flag)
1246
{
1247
	struct iwl3945_host_cmd cmd = {
1248 1249 1250 1251 1252 1253 1254
		.id = REPLY_CARD_STATE_CMD,
		.len = sizeof(u32),
		.data = &flags,
		.meta.flags = meta_flag,
	};

	if (meta_flag & CMD_ASYNC)
1255
		cmd.meta.u.callback = iwl3945_card_state_sync_callback;
1256

1257
	return iwl3945_send_cmd(priv, &cmd);
1258 1259
}

1260 1261
static int iwl3945_add_sta_sync_callback(struct iwl3945_priv *priv,
				     struct iwl3945_cmd *cmd, struct sk_buff *skb)
1262
{
1263
	struct iwl3945_rx_packet *res = NULL;
1264 1265 1266 1267 1268 1269

	if (!skb) {
		IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
		return 1;
	}

1270
	res = (struct iwl3945_rx_packet *)skb->data;
1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287
	if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
		IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
			  res->hdr.flags);
		return 1;
	}

	switch (res->u.add_sta.status) {
	case ADD_STA_SUCCESS_MSK:
		break;
	default:
		break;
	}

	/* We didn't cache the SKB; let the caller free it */
	return 1;
}

1288 1289
int iwl3945_send_add_station(struct iwl3945_priv *priv,
			 struct iwl3945_addsta_cmd *sta, u8 flags)
1290
{
1291
	struct iwl3945_rx_packet *res = NULL;
1292
	int rc = 0;
1293
	struct iwl3945_host_cmd cmd = {
1294
		.id = REPLY_ADD_STA,
1295
		.len = sizeof(struct iwl3945_addsta_cmd),
1296 1297 1298 1299 1300
		.meta.flags = flags,
		.data = sta,
	};

	if (flags & CMD_ASYNC)
1301
		cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
1302 1303 1304
	else
		cmd.meta.flags |= CMD_WANT_SKB;

1305
	rc = iwl3945_send_cmd(priv, &cmd);
1306 1307 1308 1309

	if (rc || (flags & CMD_ASYNC))
		return rc;

1310
	res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334
	if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
		IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
			  res->hdr.flags);
		rc = -EIO;
	}

	if (rc == 0) {
		switch (res->u.add_sta.status) {
		case ADD_STA_SUCCESS_MSK:
			IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
			break;
		default:
			rc = -EIO;
			IWL_WARNING("REPLY_ADD_STA failed\n");
			break;
		}
	}

	priv->alloc_rxb_skb--;
	dev_kfree_skb_any(cmd.meta.u.skb);

	return rc;
}

1335
static int iwl3945_update_sta_key_info(struct iwl3945_priv *priv,
1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368
				   struct ieee80211_key_conf *keyconf,
				   u8 sta_id)
{
	unsigned long flags;
	__le16 key_flags = 0;

	switch (keyconf->alg) {
	case ALG_CCMP:
		key_flags |= STA_KEY_FLG_CCMP;
		key_flags |= cpu_to_le16(
				keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
		key_flags &= ~STA_KEY_FLG_INVALID;
		break;
	case ALG_TKIP:
	case ALG_WEP:
	default:
		return -EINVAL;
	}
	spin_lock_irqsave(&priv->sta_lock, flags);
	priv->stations[sta_id].keyinfo.alg = keyconf->alg;
	priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
	memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
	       keyconf->keylen);

	memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
	       keyconf->keylen);
	priv->stations[sta_id].sta.key.key_flags = key_flags;
	priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
	priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;

	spin_unlock_irqrestore(&priv->sta_lock, flags);

	IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
1369
	iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1370 1371 1372
	return 0;
}

1373
static int iwl3945_clear_sta_key_info(struct iwl3945_priv *priv, u8 sta_id)
1374 1375 1376 1377
{
	unsigned long flags;

	spin_lock_irqsave(&priv->sta_lock, flags);
1378 1379
	memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
	memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl3945_keyinfo));
1380 1381 1382 1383 1384 1385
	priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
	priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
	priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
	spin_unlock_irqrestore(&priv->sta_lock, flags);

	IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
1386
	iwl3945_send_add_station(priv, &priv->stations[sta_id].sta, 0);
1387 1388 1389
	return 0;
}

1390
static void iwl3945_clear_free_frames(struct iwl3945_priv *priv)
1391 1392 1393 1394 1395 1396 1397 1398 1399
{
	struct list_head *element;

	IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
		       priv->frames_count);

	while (!list_empty(&priv->free_frames)) {
		element = priv->free_frames.next;
		list_del(element);
1400
		kfree(list_entry(element, struct iwl3945_frame, list));
1401 1402 1403 1404 1405 1406 1407 1408 1409 1410
		priv->frames_count--;
	}

	if (priv->frames_count) {
		IWL_WARNING("%d frames still in use.  Did we lose one?\n",
			    priv->frames_count);
		priv->frames_count = 0;
	}
}

1411
static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl3945_priv *priv)
1412
{
1413
	struct iwl3945_frame *frame;
1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427
	struct list_head *element;
	if (list_empty(&priv->free_frames)) {
		frame = kzalloc(sizeof(*frame), GFP_KERNEL);
		if (!frame) {
			IWL_ERROR("Could not allocate frame!\n");
			return NULL;
		}

		priv->frames_count++;
		return frame;
	}

	element = priv->free_frames.next;
	list_del(element);
1428
	return list_entry(element, struct iwl3945_frame, list);
1429 1430
}

1431
static void iwl3945_free_frame(struct iwl3945_priv *priv, struct iwl3945_frame *frame)
1432 1433 1434 1435 1436
{
	memset(frame, 0, sizeof(*frame));
	list_add(&frame->list, &priv->free_frames);
}

1437
unsigned int iwl3945_fill_beacon_frame(struct iwl3945_priv *priv,
1438 1439 1440 1441
				struct ieee80211_hdr *hdr,
				const u8 *dest, int left)
{

1442
	if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454
	    ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
	     (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
		return 0;

	if (priv->ibss_beacon->len > left)
		return 0;

	memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);

	return priv->ibss_beacon->len;
}

1455
static int iwl3945_rate_index_from_plcp(int plcp)
1456 1457 1458 1459
{
	int i = 0;

	for (i = 0; i < IWL_RATE_COUNT; i++)
1460
		if (iwl3945_rates[i].plcp == plcp)
1461 1462 1463 1464
			return i;
	return -1;
}

1465
static u8 iwl3945_rate_get_lowest_plcp(int rate_mask)
1466 1467 1468 1469
{
	u8 i;

	for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
1470
	     i = iwl3945_rates[i].next_ieee) {
1471
		if (rate_mask & (1 << i))
1472
			return iwl3945_rates[i].plcp;
1473 1474 1475 1476 1477
	}

	return IWL_RATE_INVALID;
}

1478
static int iwl3945_send_beacon_cmd(struct iwl3945_priv *priv)
1479
{
1480
	struct iwl3945_frame *frame;
1481 1482 1483 1484
	unsigned int frame_size;
	int rc;
	u8 rate;

1485
	frame = iwl3945_get_free_frame(priv);
1486 1487 1488 1489 1490 1491 1492 1493

	if (!frame) {
		IWL_ERROR("Could not obtain free frame buffer for beacon "
			  "command.\n");
		return -ENOMEM;
	}

	if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
1494
		rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic &
1495 1496 1497 1498
						0xFF0);
		if (rate == IWL_INVALID_RATE)
			rate = IWL_RATE_6M_PLCP;
	} else {
1499
		rate = iwl3945_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
1500 1501 1502 1503
		if (rate == IWL_INVALID_RATE)
			rate = IWL_RATE_1M_PLCP;
	}

1504
	frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
1505

1506
	rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
1507 1508
			      &frame->u.cmd[0]);

1509
	iwl3945_free_frame(priv, frame);
1510 1511 1512 1513 1514 1515 1516 1517 1518 1519

	return rc;
}

/******************************************************************************
 *
 * EEPROM related functions
 *
 ******************************************************************************/

1520
static void get_eeprom_mac(struct iwl3945_priv *priv, u8 *mac)
1521 1522 1523 1524 1525
{
	memcpy(mac, priv->eeprom.mac_address, 6);
}

/**
1526
 * iwl3945_eeprom_init - read EEPROM contents
1527 1528 1529 1530 1531
 *
 * Load the EEPROM from adapter into priv->eeprom
 *
 * NOTE:  This routine uses the non-debug IO access functions.
 */
1532
int iwl3945_eeprom_init(struct iwl3945_priv *priv)
1533 1534
{
	u16 *e = (u16 *)&priv->eeprom;
1535
	u32 gp = iwl3945_read32(priv, CSR_EEPROM_GP);
1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552
	u32 r;
	int sz = sizeof(priv->eeprom);
	int rc;
	int i;
	u16 addr;

	/* The EEPROM structure has several padding buffers within it
	 * and when adding new EEPROM maps is subject to programmer errors
	 * which may be very difficult to identify without explicitly
	 * checking the resulting size of the eeprom map. */
	BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);

	if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
		IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
		return -ENOENT;
	}

1553
	rc = iwl3945_eeprom_acquire_semaphore(priv);
1554
	if (rc < 0) {
1555
		IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
1556 1557 1558 1559 1560
		return -ENOENT;
	}

	/* eeprom is an array of 16bit values */
	for (addr = 0; addr < sz; addr += sizeof(u16)) {
1561 1562
		_iwl3945_write32(priv, CSR_EEPROM_REG, addr << 1);
		_iwl3945_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
1563 1564 1565

		for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
					i += IWL_EEPROM_ACCESS_DELAY) {
1566
			r = _iwl3945_read_direct32(priv, CSR_EEPROM_REG);
1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586
			if (r & CSR_EEPROM_REG_READ_VALID_MSK)
				break;
			udelay(IWL_EEPROM_ACCESS_DELAY);
		}

		if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
			IWL_ERROR("Time out reading EEPROM[%d]", addr);
			return -ETIMEDOUT;
		}
		e[addr / 2] = le16_to_cpu(r >> 16);
	}

	return 0;
}

/******************************************************************************
 *
 * Misc. internal state and helper functions
 *
 ******************************************************************************/
1587
#ifdef CONFIG_IWL3945_DEBUG
1588 1589

/**
1590
 * iwl3945_report_frame - dump frame to syslog during debug sessions
1591 1592 1593 1594 1595 1596
 *
 * hack this function to show different aspects of received frames,
 * including selective frame dumps.
 * group100 parameter selects whether to show 1 out of 100 good frames.
 *
 * TODO:  ieee80211_hdr stuff is common to 3945 and 4965, so frame type
1597
 *        info output is okay, but some of this stuff (e.g. iwl3945_rx_frame_stats)
1598 1599 1600
 *        is 3945-specific and gives bad output for 4965.  Need to split the
 *        functionality, keep common stuff here.
 */
1601 1602
void iwl3945_report_frame(struct iwl3945_priv *priv,
		      struct iwl3945_rx_packet *pkt,
1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623
		      struct ieee80211_hdr *header, int group100)
{
	u32 to_us;
	u32 print_summary = 0;
	u32 print_dump = 0;	/* set to 1 to dump all frames' contents */
	u32 hundred = 0;
	u32 dataframe = 0;
	u16 fc;
	u16 seq_ctl;
	u16 channel;
	u16 phy_flags;
	int rate_sym;
	u16 length;
	u16 status;
	u16 bcn_tmr;
	u32 tsf_low;
	u64 tsf;
	u8 rssi;
	u8 agc;
	u16 sig_avg;
	u16 noise_diff;
1624 1625 1626
	struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
	struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
	struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701
	u8 *data = IWL_RX_DATA(pkt);

	/* MAC header */
	fc = le16_to_cpu(header->frame_control);
	seq_ctl = le16_to_cpu(header->seq_ctrl);

	/* metadata */
	channel = le16_to_cpu(rx_hdr->channel);
	phy_flags = le16_to_cpu(rx_hdr->phy_flags);
	rate_sym = rx_hdr->rate;
	length = le16_to_cpu(rx_hdr->len);

	/* end-of-frame status and timestamp */
	status = le32_to_cpu(rx_end->status);
	bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
	tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
	tsf = le64_to_cpu(rx_end->timestamp);

	/* signal statistics */
	rssi = rx_stats->rssi;
	agc = rx_stats->agc;
	sig_avg = le16_to_cpu(rx_stats->sig_avg);
	noise_diff = le16_to_cpu(rx_stats->noise_diff);

	to_us = !compare_ether_addr(header->addr1, priv->mac_addr);

	/* if data frame is to us and all is good,
	 *   (optionally) print summary for only 1 out of every 100 */
	if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
	    (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
		dataframe = 1;
		if (!group100)
			print_summary = 1;	/* print each frame */
		else if (priv->framecnt_to_us < 100) {
			priv->framecnt_to_us++;
			print_summary = 0;
		} else {
			priv->framecnt_to_us = 0;
			print_summary = 1;
			hundred = 1;
		}
	} else {
		/* print summary for all other frames */
		print_summary = 1;
	}

	if (print_summary) {
		char *title;
		u32 rate;

		if (hundred)
			title = "100Frames";
		else if (fc & IEEE80211_FCTL_RETRY)
			title = "Retry";
		else if (ieee80211_is_assoc_response(fc))
			title = "AscRsp";
		else if (ieee80211_is_reassoc_response(fc))
			title = "RasRsp";
		else if (ieee80211_is_probe_response(fc)) {
			title = "PrbRsp";
			print_dump = 1;	/* dump frame contents */
		} else if (ieee80211_is_beacon(fc)) {
			title = "Beacon";
			print_dump = 1;	/* dump frame contents */
		} else if (ieee80211_is_atim(fc))
			title = "ATIM";
		else if (ieee80211_is_auth(fc))
			title = "Auth";
		else if (ieee80211_is_deauth(fc))
			title = "DeAuth";
		else if (ieee80211_is_disassoc(fc))
			title = "DisAssoc";
		else
			title = "Frame";

1702
		rate = iwl3945_rate_index_from_plcp(rate_sym);
1703 1704 1705
		if (rate == -1)
			rate = 0;
		else
1706
			rate = iwl3945_rates[rate].ieee / 2;
1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727

		/* print frame summary.
		 * MAC addresses show just the last byte (for brevity),
		 *    but you can hack it to show more, if you'd like to. */
		if (dataframe)
			IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
				     "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
				     title, fc, header->addr1[5],
				     length, rssi, channel, rate);
		else {
			/* src/dst addresses assume managed mode */
			IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
				     "src=0x%02x, rssi=%u, tim=%lu usec, "
				     "phy=0x%02x, chnl=%d\n",
				     title, fc, header->addr1[5],
				     header->addr3[5], rssi,
				     tsf_low - priv->scan_start_tsf,
				     phy_flags, channel);
		}
	}
	if (print_dump)
1728
		iwl3945_print_hex_dump(IWL_DL_RX, data, length);
1729 1730 1731
}
#endif

1732
static void iwl3945_unset_hw_setting(struct iwl3945_priv *priv)
1733 1734 1735
{
	if (priv->hw_setting.shared_virt)
		pci_free_consistent(priv->pci_dev,
1736
				    sizeof(struct iwl3945_shared),
1737 1738 1739 1740 1741
				    priv->hw_setting.shared_virt,
				    priv->hw_setting.shared_phys);
}

/**
1742
 * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
1743 1744 1745
 *
 * return : set the bit for each supported rate insert in ie
 */
1746
static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
1747
				    u16 basic_rate, int *left)
1748 1749 1750
{
	u16 ret_rates = 0, bit;
	int i;
1751 1752
	u8 *cnt = ie;
	u8 *rates = ie + 1;
1753 1754 1755 1756

	for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
		if (bit & supported_rate) {
			ret_rates |= bit;
1757
			rates[*cnt] = iwl3945_rates[i].ieee |
1758 1759 1760 1761 1762
				((bit & basic_rate) ? 0x80 : 0x00);
			(*cnt)++;
			(*left)--;
			if ((*left <= 0) ||
			    (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
1763 1764 1765 1766 1767 1768 1769 1770
				break;
		}
	}

	return ret_rates;
}

/**
1771
 * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
1772
 */
1773
static u16 iwl3945_fill_probe_req(struct iwl3945_priv *priv,
1774 1775 1776 1777 1778
			      struct ieee80211_mgmt *frame,
			      int left, int is_direct)
{
	int len = 0;
	u8 *pos = NULL;
1779
	u16 active_rates, ret_rates, cck_rates;
1780 1781 1782 1783 1784 1785 1786 1787 1788

	/* Make sure there is enough space for the probe request,
	 * two mandatory IEs and the data */
	left -= 24;
	if (left < 0)
		return 0;
	len += 24;

	frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1789
	memcpy(frame->da, iwl3945_broadcast_addr, ETH_ALEN);
1790
	memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
1791
	memcpy(frame->bssid, iwl3945_broadcast_addr, ETH_ALEN);
1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823
	frame->seq_ctrl = 0;

	/* fill in our indirect SSID IE */
	/* ...next IE... */

	left -= 2;
	if (left < 0)
		return 0;
	len += 2;
	pos = &(frame->u.probe_req.variable[0]);
	*pos++ = WLAN_EID_SSID;
	*pos++ = 0;

	/* fill in our direct SSID IE... */
	if (is_direct) {
		/* ...next IE... */
		left -= 2 + priv->essid_len;
		if (left < 0)
			return 0;
		/* ... fill it in... */
		*pos++ = WLAN_EID_SSID;
		*pos++ = priv->essid_len;
		memcpy(pos, priv->essid, priv->essid_len);
		pos += priv->essid_len;
		len += 2 + priv->essid_len;
	}

	/* fill in supported rate */
	/* ...next IE... */
	left -= 2;
	if (left < 0)
		return 0;
1824

1825 1826 1827
	/* ... fill it in... */
	*pos++ = WLAN_EID_SUPP_RATES;
	*pos = 0;
1828 1829 1830

	priv->active_rate = priv->rates_mask;
	active_rates = priv->active_rate;
1831 1832
	priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;

1833
	cck_rates = IWL_CCK_RATES_MASK & active_rates;
1834
	ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
1835 1836 1837
			priv->active_rate_basic, &left);
	active_rates &= ~ret_rates;

1838
	ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
1839 1840 1841
				 priv->active_rate_basic, &left);
	active_rates &= ~ret_rates;

1842 1843
	len += 2 + *pos;
	pos += (*pos) + 1;
1844
	if (active_rates == 0)
1845 1846 1847 1848 1849 1850 1851 1852 1853 1854
		goto fill_end;

	/* fill in supported extended rate */
	/* ...next IE... */
	left -= 2;
	if (left < 0)
		return 0;
	/* ... fill it in... */
	*pos++ = WLAN_EID_EXT_SUPP_RATES;
	*pos = 0;
1855
	iwl3945_supported_rate_to_ie(pos, active_rates,
1856
				 priv->active_rate_basic, &left);
1857 1858 1859 1860 1861 1862 1863 1864 1865 1866
	if (*pos > 0)
		len += 2 + *pos;

 fill_end:
	return (u16)len;
}

/*
 * QoS  support
*/
1867
#ifdef CONFIG_IWL3945_QOS
1868 1869
static int iwl3945_send_qos_params_command(struct iwl3945_priv *priv,
				       struct iwl3945_qosparam_cmd *qos)
1870 1871
{

1872 1873
	return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
				sizeof(struct iwl3945_qosparam_cmd), qos);
1874 1875
}

1876
static void iwl3945_reset_qos(struct iwl3945_priv *priv)
1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962
{
	u16 cw_min = 15;
	u16 cw_max = 1023;
	u8 aifs = 2;
	u8 is_legacy = 0;
	unsigned long flags;
	int i;

	spin_lock_irqsave(&priv->lock, flags);
	priv->qos_data.qos_active = 0;

	if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
		if (priv->qos_data.qos_enable)
			priv->qos_data.qos_active = 1;
		if (!(priv->active_rate & 0xfff0)) {
			cw_min = 31;
			is_legacy = 1;
		}
	} else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
		if (priv->qos_data.qos_enable)
			priv->qos_data.qos_active = 1;
	} else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
		cw_min = 31;
		is_legacy = 1;
	}

	if (priv->qos_data.qos_active)
		aifs = 3;

	priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
	priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
	priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
	priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
	priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;

	if (priv->qos_data.qos_active) {
		i = 1;
		priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
		priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
		priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
		priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
		priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;

		i = 2;
		priv->qos_data.def_qos_parm.ac[i].cw_min =
			cpu_to_le16((cw_min + 1) / 2 - 1);
		priv->qos_data.def_qos_parm.ac[i].cw_max =
			cpu_to_le16(cw_max);
		priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
		if (is_legacy)
			priv->qos_data.def_qos_parm.ac[i].edca_txop =
				cpu_to_le16(6016);
		else
			priv->qos_data.def_qos_parm.ac[i].edca_txop =
				cpu_to_le16(3008);
		priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;

		i = 3;
		priv->qos_data.def_qos_parm.ac[i].cw_min =
			cpu_to_le16((cw_min + 1) / 4 - 1);
		priv->qos_data.def_qos_parm.ac[i].cw_max =
			cpu_to_le16((cw_max + 1) / 2 - 1);
		priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
		priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
		if (is_legacy)
			priv->qos_data.def_qos_parm.ac[i].edca_txop =
				cpu_to_le16(3264);
		else
			priv->qos_data.def_qos_parm.ac[i].edca_txop =
				cpu_to_le16(1504);
	} else {
		for (i = 1; i < 4; i++) {
			priv->qos_data.def_qos_parm.ac[i].cw_min =
				cpu_to_le16(cw_min);
			priv->qos_data.def_qos_parm.ac[i].cw_max =
				cpu_to_le16(cw_max);
			priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
			priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
			priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
		}
	}
	IWL_DEBUG_QOS("set QoS to default \n");

	spin_unlock_irqrestore(&priv->lock, flags);
}

1963
static void iwl3945_activate_qos(struct iwl3945_priv *priv, u8 force)
1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986
{
	unsigned long flags;

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	if (!priv->qos_data.qos_enable)
		return;

	spin_lock_irqsave(&priv->lock, flags);
	priv->qos_data.def_qos_parm.qos_flags = 0;

	if (priv->qos_data.qos_cap.q_AP.queue_request &&
	    !priv->qos_data.qos_cap.q_AP.txop_request)
		priv->qos_data.def_qos_parm.qos_flags |=
			QOS_PARAM_FLG_TXOP_TYPE_MSK;

	if (priv->qos_data.qos_active)
		priv->qos_data.def_qos_parm.qos_flags |=
			QOS_PARAM_FLG_UPDATE_EDCA_MSK;

	spin_unlock_irqrestore(&priv->lock, flags);

1987
	if (force || iwl3945_is_associated(priv)) {
1988 1989 1990
		IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
			      priv->qos_data.qos_active);

1991
		iwl3945_send_qos_params_command(priv,
1992 1993 1994 1995
				&(priv->qos_data.def_qos_parm));
	}
}

1996
#endif /* CONFIG_IWL3945_QOS */
1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013
/*
 * Power management (not Tx power!) functions
 */
#define MSEC_TO_USEC 1024

#define NOSLP __constant_cpu_to_le32(0)
#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
#define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
#define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
				     __constant_cpu_to_le32(X1), \
				     __constant_cpu_to_le32(X2), \
				     __constant_cpu_to_le32(X3), \
				     __constant_cpu_to_le32(X4)}


/* default power management (not Tx power) table values */
/* for tim  0-10 */
2014
static struct iwl3945_power_vec_entry range_0[IWL_POWER_AC] = {
2015 2016 2017 2018 2019 2020 2021 2022 2023
	{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
	{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
	{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
	{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
	{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
	{{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
};

/* for tim > 10 */
2024
static struct iwl3945_power_vec_entry range_1[IWL_POWER_AC] = {
2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036
	{{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
	{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
		 SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
	{{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
		 SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
	{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
		 SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
	{{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
	{{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
		 SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
};

2037
int iwl3945_power_init_handle(struct iwl3945_priv *priv)
2038 2039
{
	int rc = 0, i;
2040 2041
	struct iwl3945_power_mgr *pow_data;
	int size = sizeof(struct iwl3945_power_vec_entry) * IWL_POWER_AC;
2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059
	u16 pci_pm;

	IWL_DEBUG_POWER("Initialize power \n");

	pow_data = &(priv->power_data);

	memset(pow_data, 0, sizeof(*pow_data));

	pow_data->active_index = IWL_POWER_RANGE_0;
	pow_data->dtim_val = 0xffff;

	memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
	memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);

	rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
	if (rc != 0)
		return 0;
	else {
2060
		struct iwl3945_powertable_cmd *cmd;
2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075

		IWL_DEBUG_POWER("adjust power command flags\n");

		for (i = 0; i < IWL_POWER_AC; i++) {
			cmd = &pow_data->pwr_range_0[i].cmd;

			if (pci_pm & 0x1)
				cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
			else
				cmd->flags |= IWL_POWER_PCI_PM_MSK;
		}
	}
	return rc;
}

2076 2077
static int iwl3945_update_power_cmd(struct iwl3945_priv *priv,
				struct iwl3945_powertable_cmd *cmd, u32 mode)
2078 2079 2080 2081
{
	int rc = 0, i;
	u8 skip;
	u32 max_sleep = 0;
2082
	struct iwl3945_power_vec_entry *range;
2083
	u8 period = 0;
2084
	struct iwl3945_power_mgr *pow_data;
2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096

	if (mode > IWL_POWER_INDEX_5) {
		IWL_DEBUG_POWER("Error invalid power mode \n");
		return -1;
	}
	pow_data = &(priv->power_data);

	if (pow_data->active_index == IWL_POWER_RANGE_0)
		range = &pow_data->pwr_range_0[0];
	else
		range = &pow_data->pwr_range_1[1];

2097
	memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139

#ifdef IWL_MAC80211_DISABLE
	if (priv->assoc_network != NULL) {
		unsigned long flags;

		period = priv->assoc_network->tim.tim_period;
	}
#endif	/*IWL_MAC80211_DISABLE */
	skip = range[mode].no_dtim;

	if (period == 0) {
		period = 1;
		skip = 0;
	}

	if (skip == 0) {
		max_sleep = period;
		cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
	} else {
		__le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
		max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
		cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
	}

	for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
		if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
			cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
	}

	IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
	IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
	IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
	IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
			le32_to_cpu(cmd->sleep_interval[0]),
			le32_to_cpu(cmd->sleep_interval[1]),
			le32_to_cpu(cmd->sleep_interval[2]),
			le32_to_cpu(cmd->sleep_interval[3]),
			le32_to_cpu(cmd->sleep_interval[4]));

	return rc;
}

2140
static int iwl3945_send_power_mode(struct iwl3945_priv *priv, u32 mode)
2141
{
2142
	u32 uninitialized_var(final_mode);
2143
	int rc;
2144
	struct iwl3945_powertable_cmd cmd;
2145 2146

	/* If on battery, set to 3,
2147
	 * if plugged into AC power, set to CAM ("continuously aware mode"),
2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160
	 * else user level */
	switch (mode) {
	case IWL_POWER_BATTERY:
		final_mode = IWL_POWER_INDEX_3;
		break;
	case IWL_POWER_AC:
		final_mode = IWL_POWER_MODE_CAM;
		break;
	default:
		final_mode = mode;
		break;
	}

2161
	iwl3945_update_power_cmd(priv, &cmd, final_mode);
2162

2163
	rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
2164 2165 2166 2167 2168 2169 2170 2171 2172

	if (final_mode == IWL_POWER_MODE_CAM)
		clear_bit(STATUS_POWER_PMI, &priv->status);
	else
		set_bit(STATUS_POWER_PMI, &priv->status);

	return rc;
}

2173
int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202
{
	/* Filter incoming packets to determine if they are targeted toward
	 * this network, discarding packets coming from ourselves */
	switch (priv->iw_mode) {
	case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source    | BSSID */
		/* packets from our adapter are dropped (echo) */
		if (!compare_ether_addr(header->addr2, priv->mac_addr))
			return 0;
		/* {broad,multi}cast packets to our IBSS go through */
		if (is_multicast_ether_addr(header->addr1))
			return !compare_ether_addr(header->addr3, priv->bssid);
		/* packets to our adapter go through */
		return !compare_ether_addr(header->addr1, priv->mac_addr);
	case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
		/* packets from our adapter are dropped (echo) */
		if (!compare_ether_addr(header->addr3, priv->mac_addr))
			return 0;
		/* {broad,multi}cast packets to our BSS go through */
		if (is_multicast_ether_addr(header->addr1))
			return !compare_ether_addr(header->addr2, priv->bssid);
		/* packets to our adapter go through */
		return !compare_ether_addr(header->addr1, priv->mac_addr);
	}

	return 1;
}

#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x

2203
static const char *iwl3945_get_tx_fail_reason(u32 status)
2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229
{
	switch (status & TX_STATUS_MSK) {
	case TX_STATUS_SUCCESS:
		return "SUCCESS";
		TX_STATUS_ENTRY(SHORT_LIMIT);
		TX_STATUS_ENTRY(LONG_LIMIT);
		TX_STATUS_ENTRY(FIFO_UNDERRUN);
		TX_STATUS_ENTRY(MGMNT_ABORT);
		TX_STATUS_ENTRY(NEXT_FRAG);
		TX_STATUS_ENTRY(LIFE_EXPIRE);
		TX_STATUS_ENTRY(DEST_PS);
		TX_STATUS_ENTRY(ABORTED);
		TX_STATUS_ENTRY(BT_RETRY);
		TX_STATUS_ENTRY(STA_INVALID);
		TX_STATUS_ENTRY(FRAG_DROPPED);
		TX_STATUS_ENTRY(TID_DISABLE);
		TX_STATUS_ENTRY(FRAME_FLUSHED);
		TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
		TX_STATUS_ENTRY(TX_LOCKED);
		TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
	}

	return "UNKNOWN";
}

/**
2230
 * iwl3945_scan_cancel - Cancel any currently executing HW scan
2231 2232 2233
 *
 * NOTE: priv->mutex is not required before calling this function
 */
2234
static int iwl3945_scan_cancel(struct iwl3945_priv *priv)
2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256
{
	if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
		clear_bit(STATUS_SCANNING, &priv->status);
		return 0;
	}

	if (test_bit(STATUS_SCANNING, &priv->status)) {
		if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
			IWL_DEBUG_SCAN("Queuing scan abort.\n");
			set_bit(STATUS_SCAN_ABORTING, &priv->status);
			queue_work(priv->workqueue, &priv->abort_scan);

		} else
			IWL_DEBUG_SCAN("Scan abort already in progress.\n");

		return test_bit(STATUS_SCANNING, &priv->status);
	}

	return 0;
}

/**
2257
 * iwl3945_scan_cancel_timeout - Cancel any currently executing HW scan
2258 2259 2260 2261
 * @ms: amount of time to wait (in milliseconds) for scan to abort
 *
 * NOTE: priv->mutex must be held before calling this function
 */
2262
static int iwl3945_scan_cancel_timeout(struct iwl3945_priv *priv, unsigned long ms)
2263 2264 2265 2266
{
	unsigned long now = jiffies;
	int ret;

2267
	ret = iwl3945_scan_cancel(priv);
2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280
	if (ret && ms) {
		mutex_unlock(&priv->mutex);
		while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
				test_bit(STATUS_SCANNING, &priv->status))
			msleep(1);
		mutex_lock(&priv->mutex);

		return test_bit(STATUS_SCANNING, &priv->status);
	}

	return ret;
}

2281
static void iwl3945_sequence_reset(struct iwl3945_priv *priv)
2282 2283 2284 2285 2286 2287 2288 2289 2290 2291
{
	/* Reset ieee stats */

	/* We don't reset the net_device_stats (ieee->stats) on
	 * re-association */

	priv->last_seq_num = -1;
	priv->last_frag_num = -1;
	priv->last_packet_time = 0;

2292
	iwl3945_scan_cancel(priv);
2293 2294 2295 2296 2297
}

#define MAX_UCODE_BEACON_INTERVAL	1024
#define INTEL_CONN_LISTEN_INTERVAL	__constant_cpu_to_le16(0xA)

2298
static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310
{
	u16 new_val = 0;
	u16 beacon_factor = 0;

	beacon_factor =
	    (beacon_val + MAX_UCODE_BEACON_INTERVAL)
		/ MAX_UCODE_BEACON_INTERVAL;
	new_val = beacon_val / beacon_factor;

	return cpu_to_le16(new_val);
}

2311
static void iwl3945_setup_rxon_timing(struct iwl3945_priv *priv)
2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324 2325 2326 2327 2328 2329 2330 2331 2332 2333 2334 2335 2336 2337 2338 2339 2340
{
	u64 interval_tm_unit;
	u64 tsf, result;
	unsigned long flags;
	struct ieee80211_conf *conf = NULL;
	u16 beacon_int = 0;

	conf = ieee80211_get_hw_conf(priv->hw);

	spin_lock_irqsave(&priv->lock, flags);
	priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
	priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);

	priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;

	tsf = priv->timestamp1;
	tsf = ((tsf << 32) | priv->timestamp0);

	beacon_int = priv->beacon_int;
	spin_unlock_irqrestore(&priv->lock, flags);

	if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
		if (beacon_int == 0) {
			priv->rxon_timing.beacon_interval = cpu_to_le16(100);
			priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
		} else {
			priv->rxon_timing.beacon_interval =
				cpu_to_le16(beacon_int);
			priv->rxon_timing.beacon_interval =
2341
			    iwl3945_adjust_beacon_interval(
2342 2343 2344 2345 2346 2347
				le16_to_cpu(priv->rxon_timing.beacon_interval));
		}

		priv->rxon_timing.atim_window = 0;
	} else {
		priv->rxon_timing.beacon_interval =
2348
			iwl3945_adjust_beacon_interval(conf->beacon_int);
2349 2350 2351 2352 2353 2354 2355 2356 2357 2358 2359 2360 2361 2362 2363 2364 2365 2366
		/* TODO: we need to get atim_window from upper stack
		 * for now we set to 0 */
		priv->rxon_timing.atim_window = 0;
	}

	interval_tm_unit =
		(le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
	result = do_div(tsf, interval_tm_unit);
	priv->rxon_timing.beacon_init_val =
	    cpu_to_le32((u32) ((u64) interval_tm_unit - result));

	IWL_DEBUG_ASSOC
	    ("beacon interval %d beacon timer %d beacon tim %d\n",
		le16_to_cpu(priv->rxon_timing.beacon_interval),
		le32_to_cpu(priv->rxon_timing.beacon_init_val),
		le16_to_cpu(priv->rxon_timing.atim_window));
}

2367
static int iwl3945_scan_initiate(struct iwl3945_priv *priv)
2368 2369 2370 2371 2372 2373
{
	if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
		IWL_ERROR("APs don't scan.\n");
		return 0;
	}

2374
	if (!iwl3945_is_ready_rf(priv)) {
2375 2376 2377 2378 2379 2380 2381 2382 2383 2384 2385 2386 2387 2388 2389 2390 2391 2392 2393 2394 2395 2396 2397 2398 2399 2400
		IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
		return -EIO;
	}

	if (test_bit(STATUS_SCANNING, &priv->status)) {
		IWL_DEBUG_SCAN("Scan already in progress.\n");
		return -EAGAIN;
	}

	if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
		IWL_DEBUG_SCAN("Scan request while abort pending.  "
			       "Queuing.\n");
		return -EAGAIN;
	}

	IWL_DEBUG_INFO("Starting scan...\n");
	priv->scan_bands = 2;
	set_bit(STATUS_SCANNING, &priv->status);
	priv->scan_start = jiffies;
	priv->scan_pass_start = priv->scan_start;

	queue_work(priv->workqueue, &priv->request_scan);

	return 0;
}

2401
static int iwl3945_set_rxon_hwcrypto(struct iwl3945_priv *priv, int hw_decrypt)
2402
{
2403
	struct iwl3945_rxon_cmd *rxon = &priv->staging_rxon;
2404 2405 2406 2407 2408 2409 2410 2411 2412

	if (hw_decrypt)
		rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
	else
		rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;

	return 0;
}

2413
static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode)
2414 2415 2416 2417 2418 2419 2420
{
	if (phymode == MODE_IEEE80211A) {
		priv->staging_rxon.flags &=
		    ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
		      | RXON_FLG_CCK_MSK);
		priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
	} else {
2421
		/* Copied from iwl3945_bg_post_associate() */
2422 2423 2424 2425 2426 2427 2428 2429 2430 2431 2432 2433 2434 2435 2436
		if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
			priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
		else
			priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;

		if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
			priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;

		priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
		priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
		priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
	}
}

/*
2437
 * initialize rxon structure with default values from eeprom
2438
 */
2439
static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2440
{
2441
	const struct iwl3945_channel_info *ch_info;
2442 2443 2444 2445 2446 2447 2448 2449 2450 2451 2452 2453 2454 2455 2456 2457 2458 2459 2460 2461 2462 2463 2464 2465 2466 2467 2468 2469 2470 2471 2472 2473 2474 2475 2476 2477

	memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));

	switch (priv->iw_mode) {
	case IEEE80211_IF_TYPE_AP:
		priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
		break;

	case IEEE80211_IF_TYPE_STA:
		priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
		priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
		break;

	case IEEE80211_IF_TYPE_IBSS:
		priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
		priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
		priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
						  RXON_FILTER_ACCEPT_GRP_MSK;
		break;

	case IEEE80211_IF_TYPE_MNTR:
		priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
		priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
		    RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
		break;
	}

#if 0
	/* TODO:  Figure out when short_preamble would be set and cache from
	 * that */
	if (!hw_to_local(priv->hw)->short_preamble)
		priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
	else
		priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
#endif

2478
	ch_info = iwl3945_get_channel_info(priv, priv->phymode,
2479 2480 2481 2482 2483 2484 2485 2486 2487 2488 2489 2490 2491 2492 2493 2494 2495 2496 2497
				       le16_to_cpu(priv->staging_rxon.channel));

	if (!ch_info)
		ch_info = &priv->channel_info[0];

	/*
	 * in some case A channels are all non IBSS
	 * in this case force B/G channel
	 */
	if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
	    !(is_channel_ibss(ch_info)))
		ch_info = &priv->channel_info[0];

	priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
	if (is_channel_a_band(ch_info))
		priv->phymode = MODE_IEEE80211A;
	else
		priv->phymode = MODE_IEEE80211G;

2498
	iwl3945_set_flags_for_phymode(priv, priv->phymode);
2499 2500 2501 2502 2503 2504 2505

	priv->staging_rxon.ofdm_basic_rates =
	    (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
	priv->staging_rxon.cck_basic_rates =
	    (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
}

2506
static int iwl3945_set_mode(struct iwl3945_priv *priv, int mode)
2507
{
2508
	if (!iwl3945_is_ready_rf(priv))
2509 2510 2511
		return -EAGAIN;

	if (mode == IEEE80211_IF_TYPE_IBSS) {
2512
		const struct iwl3945_channel_info *ch_info;
2513

2514
		ch_info = iwl3945_get_channel_info(priv,
2515 2516 2517 2518 2519 2520 2521 2522 2523 2524 2525
			priv->phymode,
			le16_to_cpu(priv->staging_rxon.channel));

		if (!ch_info || !is_channel_ibss(ch_info)) {
			IWL_ERROR("channel %d not IBSS channel\n",
				  le16_to_cpu(priv->staging_rxon.channel));
			return -EINVAL;
		}
	}

	cancel_delayed_work(&priv->scan_check);
2526
	if (iwl3945_scan_cancel_timeout(priv, 100)) {
2527 2528 2529 2530 2531 2532 2533
		IWL_WARNING("Aborted scan still in progress after 100ms\n");
		IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
		return -EAGAIN;
	}

	priv->iw_mode = mode;

2534
	iwl3945_connection_init_rx_config(priv);
2535 2536
	memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);

2537
	iwl3945_clear_stations_table(priv);
2538

2539
	iwl3945_commit_rxon(priv);
2540 2541 2542 2543

	return 0;
}

2544
static void iwl3945_build_tx_cmd_hwcrypto(struct iwl3945_priv *priv,
2545
				      struct ieee80211_tx_control *ctl,
2546
				      struct iwl3945_cmd *cmd,
2547 2548 2549
				      struct sk_buff *skb_frag,
				      int last_frag)
{
2550
	struct iwl3945_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
2551 2552 2553 2554 2555 2556 2557 2558 2559 2560 2561 2562 2563 2564 2565 2566 2567 2568 2569 2570 2571 2572 2573 2574 2575 2576 2577 2578 2579 2580 2581 2582 2583 2584 2585 2586 2587 2588 2589 2590 2591 2592

	switch (keyinfo->alg) {
	case ALG_CCMP:
		cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
		memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
		IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
		break;

	case ALG_TKIP:
#if 0
		cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;

		if (last_frag)
			memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
			       8);
		else
			memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
#endif
		break;

	case ALG_WEP:
		cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
		    (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;

		if (keyinfo->keylen == 13)
			cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;

		memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);

		IWL_DEBUG_TX("Configuring packet for WEP encryption "
			     "with key %d\n", ctl->key_idx);
		break;

	default:
		printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
		break;
	}
}

/*
 * handle build REPLY_TX command notification.
 */
2593 2594
static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
				  struct iwl3945_cmd *cmd,
2595 2596 2597 2598 2599 2600 2601 2602 2603 2604 2605 2606 2607 2608 2609 2610 2611 2612 2613 2614 2615 2616 2617 2618 2619 2620 2621 2622 2623 2624 2625 2626 2627 2628 2629 2630 2631 2632 2633 2634 2635 2636 2637 2638 2639 2640 2641
				  struct ieee80211_tx_control *ctrl,
				  struct ieee80211_hdr *hdr,
				  int is_unicast, u8 std_id)
{
	__le16 *qc;
	u16 fc = le16_to_cpu(hdr->frame_control);
	__le32 tx_flags = cmd->cmd.tx.tx_flags;

	cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
	if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
		tx_flags |= TX_CMD_FLG_ACK_MSK;
		if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
			tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
		if (ieee80211_is_probe_response(fc) &&
		    !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
			tx_flags |= TX_CMD_FLG_TSF_MSK;
	} else {
		tx_flags &= (~TX_CMD_FLG_ACK_MSK);
		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
	}

	cmd->cmd.tx.sta_id = std_id;
	if (ieee80211_get_morefrag(hdr))
		tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;

	qc = ieee80211_get_qos_ctrl(hdr);
	if (qc) {
		cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
		tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
	} else
		tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;

	if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
		tx_flags |= TX_CMD_FLG_RTS_MSK;
		tx_flags &= ~TX_CMD_FLG_CTS_MSK;
	} else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
		tx_flags &= ~TX_CMD_FLG_RTS_MSK;
		tx_flags |= TX_CMD_FLG_CTS_MSK;
	}

	if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
		tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;

	tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
	if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
		if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
		    (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
2642
			cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2643
		else
2644
			cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2645 2646 2647 2648 2649 2650 2651 2652
	} else
		cmd->cmd.tx.timeout.pm_frame_timeout = 0;

	cmd->cmd.tx.driver_txop = 0;
	cmd->cmd.tx.tx_flags = tx_flags;
	cmd->cmd.tx.next_frame_len = 0;
}

2653
static int iwl3945_get_sta_id(struct iwl3945_priv *priv, struct ieee80211_hdr *hdr)
2654 2655 2656 2657 2658 2659 2660 2661 2662 2663 2664 2665 2666 2667 2668 2669 2670 2671 2672
{
	int sta_id;
	u16 fc = le16_to_cpu(hdr->frame_control);

	/* If this frame is broadcast or not data then use the broadcast
	 * station id */
	if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
	    is_multicast_ether_addr(hdr->addr1))
		return priv->hw_setting.bcast_sta_id;

	switch (priv->iw_mode) {

	/* If this frame is part of a BSS network (we're a station), then
	 * we use the AP's station id */
	case IEEE80211_IF_TYPE_STA:
		return IWL_AP_ID;

	/* If we are an AP, then find the station, or use BCAST */
	case IEEE80211_IF_TYPE_AP:
2673
		sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2674 2675 2676 2677 2678 2679
		if (sta_id != IWL_INVALID_STATION)
			return sta_id;
		return priv->hw_setting.bcast_sta_id;

	/* If this frame is part of a IBSS network, then we use the
	 * target specific station id */
2680 2681 2682
	case IEEE80211_IF_TYPE_IBSS: {
		DECLARE_MAC_BUF(mac);

2683
		sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
2684 2685 2686
		if (sta_id != IWL_INVALID_STATION)
			return sta_id;

2687
		sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
2688 2689 2690 2691

		if (sta_id != IWL_INVALID_STATION)
			return sta_id;

2692
		IWL_DEBUG_DROP("Station %s not in station map. "
2693
			       "Defaulting to broadcast...\n",
2694
			       print_mac(mac, hdr->addr1));
2695
		iwl3945_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
2696
		return priv->hw_setting.bcast_sta_id;
2697
	}
2698
	default:
2699
		IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
2700 2701 2702 2703 2704 2705 2706
		return priv->hw_setting.bcast_sta_id;
	}
}

/*
 * start REPLY_TX command process
 */
2707
static int iwl3945_tx_skb(struct iwl3945_priv *priv,
2708 2709 2710
		      struct sk_buff *skb, struct ieee80211_tx_control *ctl)
{
	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2711
	struct iwl3945_tfd_frame *tfd;
2712 2713
	u32 *control_flags;
	int txq_id = ctl->queue;
2714 2715
	struct iwl3945_tx_queue *txq = NULL;
	struct iwl3945_queue *q = NULL;
2716 2717
	dma_addr_t phys_addr;
	dma_addr_t txcmd_phys;
2718
	struct iwl3945_cmd *out_cmd = NULL;
2719 2720 2721 2722 2723 2724 2725 2726 2727 2728 2729
	u16 len, idx, len_org;
	u8 id, hdr_len, unicast;
	u8 sta_id;
	u16 seq_number = 0;
	u16 fc;
	__le16 *qc;
	u8 wait_write_ptr = 0;
	unsigned long flags;
	int rc;

	spin_lock_irqsave(&priv->lock, flags);
2730
	if (iwl3945_is_rfkill(priv)) {
2731 2732 2733 2734 2735 2736 2737 2738 2739 2740 2741 2742 2743 2744 2745 2746 2747 2748 2749
		IWL_DEBUG_DROP("Dropping - RF KILL\n");
		goto drop_unlock;
	}

	if (!priv->interface_id) {
		IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
		goto drop_unlock;
	}

	if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
		IWL_ERROR("ERROR: No TX rate available.\n");
		goto drop_unlock;
	}

	unicast = !is_multicast_ether_addr(hdr->addr1);
	id = 0;

	fc = le16_to_cpu(hdr->frame_control);

2750
#ifdef CONFIG_IWL3945_DEBUG
2751 2752 2753 2754 2755 2756 2757 2758
	if (ieee80211_is_auth(fc))
		IWL_DEBUG_TX("Sending AUTH frame\n");
	else if (ieee80211_is_assoc_request(fc))
		IWL_DEBUG_TX("Sending ASSOC frame\n");
	else if (ieee80211_is_reassoc_request(fc))
		IWL_DEBUG_TX("Sending REASSOC frame\n");
#endif

2759
	if (!iwl3945_is_associated(priv) &&
2760
	    ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
2761
		IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
2762 2763 2764 2765 2766 2767
		goto drop_unlock;
	}

	spin_unlock_irqrestore(&priv->lock, flags);

	hdr_len = ieee80211_get_hdrlen(fc);
2768
	sta_id = iwl3945_get_sta_id(priv, hdr);
2769
	if (sta_id == IWL_INVALID_STATION) {
2770 2771 2772 2773
		DECLARE_MAC_BUF(mac);

		IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
			       print_mac(mac, hdr->addr1));
2774 2775 2776 2777 2778 2779 2780 2781 2782 2783 2784 2785 2786 2787 2788 2789 2790 2791 2792 2793
		goto drop;
	}

	IWL_DEBUG_RATE("station Id %d\n", sta_id);

	qc = ieee80211_get_qos_ctrl(hdr);
	if (qc) {
		u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
		seq_number = priv->stations[sta_id].tid[tid].seq_number &
				IEEE80211_SCTL_SEQ;
		hdr->seq_ctrl = cpu_to_le16(seq_number) |
			(hdr->seq_ctrl &
				__constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
		seq_number += 0x10;
	}
	txq = &priv->txq[txq_id];
	q = &txq->q;

	spin_lock_irqsave(&priv->lock, flags);

2794
	tfd = &txq->bd[q->write_ptr];
2795 2796
	memset(tfd, 0, sizeof(*tfd));
	control_flags = (u32 *) tfd;
2797
	idx = get_cmd_index(q, q->write_ptr, 0);
2798

2799
	memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl3945_tx_info));
2800 2801
	txq->txb[q->write_ptr].skb[0] = skb;
	memcpy(&(txq->txb[q->write_ptr].status.control),
2802 2803 2804 2805 2806 2807
	       ctl, sizeof(struct ieee80211_tx_control));
	out_cmd = &txq->cmd[idx];
	memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
	memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
	out_cmd->hdr.cmd = REPLY_TX;
	out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
2808
				INDEX_TO_SEQ(q->write_ptr)));
2809 2810 2811 2812 2813
	/* copy frags header */
	memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);

	/* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
	len = priv->hw_setting.tx_cmd_len +
2814
		sizeof(struct iwl3945_cmd_header) + hdr_len;
2815 2816 2817 2818 2819 2820 2821 2822 2823

	len_org = len;
	len = (len + 3) & ~3;

	if (len_org != len)
		len_org = 1;
	else
		len_org = 0;

2824 2825
	txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl3945_cmd) * idx +
		     offsetof(struct iwl3945_cmd, hdr);
2826

2827
	iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
2828 2829

	if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
2830
		iwl3945_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
2831 2832 2833 2834 2835 2836

	/* 802.11 null functions have no payload... */
	len = skb->len - hdr_len;
	if (len) {
		phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
					   len, PCI_DMA_TODEVICE);
2837
		iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
2838 2839 2840 2841 2842 2843 2844 2845 2846 2847 2848 2849 2850
	}

	/* If there is no payload, then only one TFD is used */
	if (!len)
		*control_flags = TFD_CTL_COUNT_SET(1);
	else
		*control_flags = TFD_CTL_COUNT_SET(2) |
			TFD_CTL_PAD_SET(U32_PAD(len));

	len = (u16)skb->len;
	out_cmd->cmd.tx.len = cpu_to_le16(len);

	/* TODO need this for burst mode later on */
2851
	iwl3945_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
2852 2853

	/* set is_hcca to 0; it probably will never be implemented */
2854
	iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
2855 2856 2857 2858 2859 2860 2861 2862 2863 2864 2865 2866 2867 2868 2869

	out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
	out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;

	if (!ieee80211_get_morefrag(hdr)) {
		txq->need_update = 1;
		if (qc) {
			u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
			priv->stations[sta_id].tid[tid].seq_number = seq_number;
		}
	} else {
		wait_write_ptr = 1;
		txq->need_update = 0;
	}

2870
	iwl3945_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
2871 2872
			   sizeof(out_cmd->cmd.tx));

2873
	iwl3945_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
2874 2875
			   ieee80211_get_hdrlen(fc));

2876 2877
	q->write_ptr = iwl3945_queue_inc_wrap(q->write_ptr, q->n_bd);
	rc = iwl3945_tx_queue_update_write_ptr(priv, txq);
2878 2879 2880 2881 2882
	spin_unlock_irqrestore(&priv->lock, flags);

	if (rc)
		return rc;

2883
	if ((iwl3945_queue_space(q) < q->high_mark)
2884 2885 2886 2887
	    && priv->mac80211_registered) {
		if (wait_write_ptr) {
			spin_lock_irqsave(&priv->lock, flags);
			txq->need_update = 1;
2888
			iwl3945_tx_queue_update_write_ptr(priv, txq);
2889 2890 2891 2892 2893 2894 2895 2896 2897 2898 2899 2900 2901 2902
			spin_unlock_irqrestore(&priv->lock, flags);
		}

		ieee80211_stop_queue(priv->hw, ctl->queue);
	}

	return 0;

drop_unlock:
	spin_unlock_irqrestore(&priv->lock, flags);
drop:
	return -1;
}

2903
static void iwl3945_set_rate(struct iwl3945_priv *priv)
2904 2905 2906 2907 2908
{
	const struct ieee80211_hw_mode *hw = NULL;
	struct ieee80211_rate *rate;
	int i;

2909
	hw = iwl3945_get_hw_mode(priv, priv->phymode);
2910 2911 2912 2913
	if (!hw) {
		IWL_ERROR("Failed to set rate: unable to get hw mode\n");
		return;
	}
2914 2915 2916 2917 2918 2919 2920 2921 2922 2923 2924 2925 2926

	priv->active_rate = 0;
	priv->active_rate_basic = 0;

	IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
		       hw->mode == MODE_IEEE80211A ?
		       'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));

	for (i = 0; i < hw->num_rates; i++) {
		rate = &(hw->rates[i]);
		if ((rate->val < IWL_RATE_COUNT) &&
		    (rate->flags & IEEE80211_RATE_SUPPORTED)) {
			IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
2927
				       rate->val, iwl3945_rates[rate->val].plcp,
2928 2929 2930 2931 2932 2933 2934
				       (rate->flags & IEEE80211_RATE_BASIC) ?
				       "*" : "");
			priv->active_rate |= (1 << rate->val);
			if (rate->flags & IEEE80211_RATE_BASIC)
				priv->active_rate_basic |= (1 << rate->val);
		} else
			IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
2935
				       rate->val, iwl3945_rates[rate->val].plcp);
2936 2937 2938 2939 2940 2941 2942 2943 2944 2945 2946 2947 2948 2949 2950 2951 2952 2953 2954 2955 2956 2957 2958 2959 2960 2961 2962 2963
	}

	IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
		       priv->active_rate, priv->active_rate_basic);

	/*
	 * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
	 * otherwise set it to the default of all CCK rates and 6, 12, 24 for
	 * OFDM
	 */
	if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
		priv->staging_rxon.cck_basic_rates =
		    ((priv->active_rate_basic &
		      IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
	else
		priv->staging_rxon.cck_basic_rates =
		    (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;

	if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
		priv->staging_rxon.ofdm_basic_rates =
		    ((priv->active_rate_basic &
		      (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
		      IWL_FIRST_OFDM_RATE) & 0xFF;
	else
		priv->staging_rxon.ofdm_basic_rates =
		   (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
}

2964
static void iwl3945_radio_kill_sw(struct iwl3945_priv *priv, int disable_radio)
2965 2966 2967 2968 2969 2970 2971 2972 2973 2974
{
	unsigned long flags;

	if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
		return;

	IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
			  disable_radio ? "OFF" : "ON");

	if (disable_radio) {
2975
		iwl3945_scan_cancel(priv);
2976 2977 2978
		/* FIXME: This is a workaround for AP */
		if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
			spin_lock_irqsave(&priv->lock, flags);
2979
			iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
2980 2981
				    CSR_UCODE_SW_BIT_RFKILL);
			spin_unlock_irqrestore(&priv->lock, flags);
2982
			iwl3945_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
2983 2984 2985 2986 2987 2988
			set_bit(STATUS_RF_KILL_SW, &priv->status);
		}
		return;
	}

	spin_lock_irqsave(&priv->lock, flags);
2989
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2990 2991 2992 2993 2994 2995 2996 2997

	clear_bit(STATUS_RF_KILL_SW, &priv->status);
	spin_unlock_irqrestore(&priv->lock, flags);

	/* wake up ucode */
	msleep(10);

	spin_lock_irqsave(&priv->lock, flags);
2998 2999 3000
	iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
	if (!iwl3945_grab_nic_access(priv))
		iwl3945_release_nic_access(priv);
3001 3002 3003 3004 3005 3006 3007 3008 3009 3010 3011 3012
	spin_unlock_irqrestore(&priv->lock, flags);

	if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
		IWL_DEBUG_RF_KILL("Can not turn radio back on - "
				  "disabled by HW switch\n");
		return;
	}

	queue_work(priv->workqueue, &priv->restart);
	return;
}

3013
void iwl3945_set_decrypted_flag(struct iwl3945_priv *priv, struct sk_buff *skb,
3014 3015 3016 3017 3018 3019 3020 3021 3022 3023 3024 3025 3026 3027 3028 3029 3030 3031 3032 3033 3034 3035 3036 3037 3038 3039 3040 3041 3042 3043 3044
			    u32 decrypt_res, struct ieee80211_rx_status *stats)
{
	u16 fc =
	    le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);

	if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
		return;

	if (!(fc & IEEE80211_FCTL_PROTECTED))
		return;

	IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
	switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
	case RX_RES_STATUS_SEC_TYPE_TKIP:
		if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
		    RX_RES_STATUS_BAD_ICV_MIC)
			stats->flag |= RX_FLAG_MMIC_ERROR;
	case RX_RES_STATUS_SEC_TYPE_WEP:
	case RX_RES_STATUS_SEC_TYPE_CCMP:
		if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
		    RX_RES_STATUS_DECRYPT_OK) {
			IWL_DEBUG_RX("hw decrypt successfully!!!\n");
			stats->flag |= RX_FLAG_DECRYPTED;
		}
		break;

	default:
		break;
	}
}

3045 3046
void iwl3945_handle_data_packet_monitor(struct iwl3945_priv *priv,
				    struct iwl3945_rx_mem_buffer *rxb,
3047 3048 3049 3050
				    void *data, short len,
				    struct ieee80211_rx_status *stats,
				    u16 phy_flags)
{
3051
	struct iwl3945_rt_rx_hdr *iwl3945_rt;
3052 3053 3054 3055 3056 3057 3058 3059 3060 3061

	/* First cache any information we need before we overwrite
	 * the information provided in the skb from the hardware */
	s8 signal = stats->ssi;
	s8 noise = 0;
	int rate = stats->rate;
	u64 tsf = stats->mactime;
	__le16 phy_flags_hw = cpu_to_le16(phy_flags);

	/* We received data from the HW, so stop the watchdog */
3062
	if (len > IWL_RX_BUF_SIZE - sizeof(*iwl3945_rt)) {
3063 3064 3065 3066 3067
		IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
		return;
	}

	/* copy the frame data to write after where the radiotap header goes */
3068 3069
	iwl3945_rt = (void *)rxb->skb->data;
	memmove(iwl3945_rt->payload, data, len);
3070

3071 3072
	iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
	iwl3945_rt->rt_hdr.it_pad = 0; /* always good to zero */
3073 3074

	/* total header + data */
3075
	iwl3945_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl3945_rt));
3076 3077

	/* Set the size of the skb to the size of the frame */
3078
	skb_put(rxb->skb, sizeof(*iwl3945_rt) + len);
3079 3080

	/* Big bitfield of all the fields we provide in radiotap */
3081
	iwl3945_rt->rt_hdr.it_present =
3082 3083 3084 3085 3086 3087 3088 3089 3090
	    cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
			(1 << IEEE80211_RADIOTAP_FLAGS) |
			(1 << IEEE80211_RADIOTAP_RATE) |
			(1 << IEEE80211_RADIOTAP_CHANNEL) |
			(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
			(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
			(1 << IEEE80211_RADIOTAP_ANTENNA));

	/* Zero the flags, we'll add to them as we go */
3091
	iwl3945_rt->rt_flags = 0;
3092

3093
	iwl3945_rt->rt_tsf = cpu_to_le64(tsf);
3094 3095

	/* Convert to dBm */
3096 3097
	iwl3945_rt->rt_dbmsignal = signal;
	iwl3945_rt->rt_dbmnoise = noise;
3098 3099

	/* Convert the channel frequency and set the flags */
3100
	iwl3945_rt->rt_channelMHz = cpu_to_le16(stats->freq);
3101
	if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
3102
		iwl3945_rt->rt_chbitmask =
3103 3104
		    cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
	else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
3105
		iwl3945_rt->rt_chbitmask =
3106 3107
		    cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
	else	/* 802.11g */
3108
		iwl3945_rt->rt_chbitmask =
3109 3110
		    cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));

3111
	rate = iwl3945_rate_index_from_plcp(rate);
3112
	if (rate == -1)
3113
		iwl3945_rt->rt_rate = 0;
3114
	else
3115
		iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
3116 3117

	/* antenna number */
3118
	iwl3945_rt->rt_antenna =
3119 3120 3121 3122
		le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;

	/* set the preamble flag if we have it */
	if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
3123
		iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
3124 3125 3126 3127 3128 3129 3130 3131 3132 3133 3134

	IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);

	stats->flag |= RX_FLAG_RADIOTAP;
	ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
	rxb->skb = NULL;
}


#define IWL_PACKET_RETRY_TIME HZ

3135
int iwl3945_is_duplicate_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *header)
3136 3137 3138 3139 3140 3141 3142 3143 3144 3145
{
	u16 sc = le16_to_cpu(header->seq_ctrl);
	u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
	u16 frag = sc & IEEE80211_SCTL_FRAG;
	u16 *last_seq, *last_frag;
	unsigned long *last_time;

	switch (priv->iw_mode) {
	case IEEE80211_IF_TYPE_IBSS:{
		struct list_head *p;
3146
		struct iwl3945_ibss_seq *entry = NULL;
3147 3148 3149 3150
		u8 *mac = header->addr2;
		int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);

		__list_for_each(p, &priv->ibss_mac_hash[index]) {
3151
			entry = list_entry(p, struct iwl3945_ibss_seq, list);
3152 3153 3154 3155 3156 3157
			if (!compare_ether_addr(entry->mac, mac))
				break;
		}
		if (p == &priv->ibss_mac_hash[index]) {
			entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
			if (!entry) {
3158
				IWL_ERROR("Cannot malloc new mac entry\n");
3159 3160 3161 3162 3163 3164
				return 0;
			}
			memcpy(entry->mac, mac, ETH_ALEN);
			entry->seq_num = seq;
			entry->frag_num = frag;
			entry->packet_time = jiffies;
3165
			list_add(&entry->list, &priv->ibss_mac_hash[index]);
3166 3167 3168 3169 3170 3171 3172 3173 3174 3175 3176 3177 3178 3179 3180 3181 3182 3183 3184 3185 3186 3187 3188 3189 3190 3191 3192 3193 3194 3195 3196 3197 3198
			return 0;
		}
		last_seq = &entry->seq_num;
		last_frag = &entry->frag_num;
		last_time = &entry->packet_time;
		break;
	}
	case IEEE80211_IF_TYPE_STA:
		last_seq = &priv->last_seq_num;
		last_frag = &priv->last_frag_num;
		last_time = &priv->last_packet_time;
		break;
	default:
		return 0;
	}
	if ((*last_seq == seq) &&
	    time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
		if (*last_frag == frag)
			goto drop;
		if (*last_frag + 1 != frag)
			/* out-of-order fragment */
			goto drop;
	} else
		*last_seq = seq;

	*last_frag = frag;
	*last_time = jiffies;
	return 0;

 drop:
	return 1;
}

3199
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3200 3201 3202 3203 3204 3205 3206 3207 3208 3209 3210 3211 3212 3213

#include "iwl-spectrum.h"

#define BEACON_TIME_MASK_LOW	0x00FFFFFF
#define BEACON_TIME_MASK_HIGH	0xFF000000
#define TIME_UNIT		1024

/*
 * extended beacon time format
 * time in usec will be changed into a 32-bit value in 8:24 format
 * the high 1 byte is the beacon counts
 * the lower 3 bytes is the time in usec within one beacon interval
 */

3214
static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
3215 3216 3217 3218 3219 3220 3221 3222 3223 3224 3225 3226 3227 3228 3229 3230 3231 3232
{
	u32 quot;
	u32 rem;
	u32 interval = beacon_interval * 1024;

	if (!interval || !usec)
		return 0;

	quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
	rem = (usec % interval) & BEACON_TIME_MASK_LOW;

	return (quot << 24) + rem;
}

/* base is usually what we get from ucode with each received frame,
 * the same as HW timer counter counting down
 */

3233
static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
3234 3235 3236 3237 3238 3239 3240 3241 3242 3243 3244 3245 3246 3247 3248 3249 3250 3251
{
	u32 base_low = base & BEACON_TIME_MASK_LOW;
	u32 addon_low = addon & BEACON_TIME_MASK_LOW;
	u32 interval = beacon_interval * TIME_UNIT;
	u32 res = (base & BEACON_TIME_MASK_HIGH) +
	    (addon & BEACON_TIME_MASK_HIGH);

	if (base_low > addon_low)
		res += base_low - addon_low;
	else if (base_low < addon_low) {
		res += interval + base_low - addon_low;
		res += (1 << 24);
	} else
		res += (1 << 24);

	return cpu_to_le32(res);
}

3252
static int iwl3945_get_measurement(struct iwl3945_priv *priv,
3253 3254 3255
			       struct ieee80211_measurement_params *params,
			       u8 type)
{
3256 3257 3258
	struct iwl3945_spectrum_cmd spectrum;
	struct iwl3945_rx_packet *res;
	struct iwl3945_host_cmd cmd = {
3259 3260 3261 3262 3263 3264 3265 3266 3267
		.id = REPLY_SPECTRUM_MEASUREMENT_CMD,
		.data = (void *)&spectrum,
		.meta.flags = CMD_WANT_SKB,
	};
	u32 add_time = le64_to_cpu(params->start_time);
	int rc;
	int spectrum_resp_status;
	int duration = le16_to_cpu(params->duration);

3268
	if (iwl3945_is_associated(priv))
3269
		add_time =
3270
		    iwl3945_usecs_to_beacons(
3271 3272 3273 3274 3275 3276 3277 3278 3279 3280 3281 3282
			le64_to_cpu(params->start_time) - priv->last_tsf,
			le16_to_cpu(priv->rxon_timing.beacon_interval));

	memset(&spectrum, 0, sizeof(spectrum));

	spectrum.channel_count = cpu_to_le16(1);
	spectrum.flags =
	    RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
	spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
	cmd.len = sizeof(spectrum);
	spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));

3283
	if (iwl3945_is_associated(priv))
3284
		spectrum.start_time =
3285
		    iwl3945_add_beacon_time(priv->last_beacon_time,
3286 3287 3288 3289 3290 3291 3292 3293 3294 3295 3296 3297
				add_time,
				le16_to_cpu(priv->rxon_timing.beacon_interval));
	else
		spectrum.start_time = 0;

	spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
	spectrum.channels[0].channel = params->channel;
	spectrum.channels[0].type = type;
	if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
		spectrum.flags |= RXON_FLG_BAND_24G_MSK |
		    RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;

3298
	rc = iwl3945_send_cmd_sync(priv, &cmd);
3299 3300 3301
	if (rc)
		return rc;

3302
	res = (struct iwl3945_rx_packet *)cmd.meta.u.skb->data;
3303 3304 3305 3306 3307 3308 3309 3310 3311
	if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
		IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
		rc = -EIO;
	}

	spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
	switch (spectrum_resp_status) {
	case 0:		/* Command will be handled */
		if (res->u.spectrum.id != 0xff) {
3312 3313
			IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
						res->u.spectrum.id);
3314 3315 3316 3317 3318 3319 3320 3321 3322 3323 3324 3325 3326 3327 3328 3329 3330
			priv->measurement_status &= ~MEASUREMENT_READY;
		}
		priv->measurement_status |= MEASUREMENT_ACTIVE;
		rc = 0;
		break;

	case 1:		/* Command will not be handled */
		rc = -EAGAIN;
		break;
	}

	dev_kfree_skb_any(cmd.meta.u.skb);

	return rc;
}
#endif

3331 3332
static void iwl3945_txstatus_to_ieee(struct iwl3945_priv *priv,
				 struct iwl3945_tx_info *tx_sta)
3333 3334 3335 3336 3337 3338 3339 3340 3341 3342 3343 3344 3345 3346 3347 3348 3349 3350
{

	tx_sta->status.ack_signal = 0;
	tx_sta->status.excessive_retries = 0;
	tx_sta->status.queue_length = 0;
	tx_sta->status.queue_number = 0;

	if (in_interrupt())
		ieee80211_tx_status_irqsafe(priv->hw,
					    tx_sta->skb[0], &(tx_sta->status));
	else
		ieee80211_tx_status(priv->hw,
				    tx_sta->skb[0], &(tx_sta->status));

	tx_sta->skb[0] = NULL;
}

/**
3351
 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
3352 3353 3354 3355 3356
 *
 * When FW advances 'R' index, all entries between old and
 * new 'R' index need to be reclaimed. As result, some free space
 * forms. If there is enough free space (> low mark), wake Tx queue.
 */
3357
static int iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv, int txq_id, int index)
3358
{
3359 3360
	struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
	struct iwl3945_queue *q = &txq->q;
3361 3362 3363 3364 3365
	int nfreed = 0;

	if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
		IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
			  "is out of range [0-%d] %d %d.\n", txq_id,
3366
			  index, q->n_bd, q->write_ptr, q->read_ptr);
3367 3368 3369
		return 0;
	}

3370
	for (index = iwl3945_queue_inc_wrap(index, q->n_bd);
3371
		q->read_ptr != index;
3372
		q->read_ptr = iwl3945_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3373
		if (txq_id != IWL_CMD_QUEUE_NUM) {
3374
			iwl3945_txstatus_to_ieee(priv,
3375
					&(txq->txb[txq->q.read_ptr]));
3376
			iwl3945_hw_txq_free_tfd(priv, txq);
3377 3378
		} else if (nfreed > 1) {
			IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
3379
					q->write_ptr, q->read_ptr);
3380 3381 3382 3383 3384
			queue_work(priv->workqueue, &priv->restart);
		}
		nfreed++;
	}

3385
	if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
3386 3387 3388 3389 3390 3391 3392 3393
			(txq_id != IWL_CMD_QUEUE_NUM) &&
			priv->mac80211_registered)
		ieee80211_wake_queue(priv->hw, txq_id);


	return nfreed;
}

3394
static int iwl3945_is_tx_success(u32 status)
3395 3396 3397 3398 3399 3400 3401 3402 3403
{
	return (status & 0xFF) == 0x1;
}

/******************************************************************************
 *
 * Generic RX handler implementations
 *
 ******************************************************************************/
3404 3405
static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
			    struct iwl3945_rx_mem_buffer *rxb)
3406
{
3407
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3408 3409 3410
	u16 sequence = le16_to_cpu(pkt->hdr.sequence);
	int txq_id = SEQ_TO_QUEUE(sequence);
	int index = SEQ_TO_INDEX(sequence);
3411
	struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
3412
	struct ieee80211_tx_status *tx_status;
3413
	struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
3414 3415 3416 3417 3418
	u32  status = le32_to_cpu(tx_resp->status);

	if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
		IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
			  "is out of range [0-%d] %d %d\n", txq_id,
3419 3420
			  index, txq->q.n_bd, txq->q.write_ptr,
			  txq->q.read_ptr);
3421 3422 3423
		return;
	}

3424
	tx_status = &(txq->txb[txq->q.read_ptr].status);
3425 3426 3427 3428 3429 3430 3431

	tx_status->retry_count = tx_resp->failure_frame;
	tx_status->queue_number = status;
	tx_status->queue_length = tx_resp->bt_kill_count;
	tx_status->queue_length |= tx_resp->failure_rts;

	tx_status->flags =
3432
	    iwl3945_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
3433

3434
	tx_status->control.tx_rate = iwl3945_rate_index_from_plcp(tx_resp->rate);
3435 3436

	IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
3437
			txq_id, iwl3945_get_tx_fail_reason(status), status,
3438 3439 3440 3441
			tx_resp->rate, tx_resp->failure_frame);

	IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
	if (index != -1)
3442
		iwl3945_tx_queue_reclaim(priv, txq_id, index);
3443 3444 3445 3446 3447 3448

	if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
		IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
}


3449 3450
static void iwl3945_rx_reply_alive(struct iwl3945_priv *priv,
			       struct iwl3945_rx_mem_buffer *rxb)
3451
{
3452 3453
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_alive_resp *palive;
3454 3455 3456 3457 3458 3459 3460 3461 3462 3463 3464 3465 3466
	struct delayed_work *pwork;

	palive = &pkt->u.alive_frame;

	IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
		       "0x%01X 0x%01X\n",
		       palive->is_valid, palive->ver_type,
		       palive->ver_subtype);

	if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
		IWL_DEBUG_INFO("Initialization Alive received.\n");
		memcpy(&priv->card_alive_init,
		       &pkt->u.alive_frame,
3467
		       sizeof(struct iwl3945_init_alive_resp));
3468 3469 3470 3471
		pwork = &priv->init_alive_start;
	} else {
		IWL_DEBUG_INFO("Runtime Alive received.\n");
		memcpy(&priv->card_alive, &pkt->u.alive_frame,
3472
		       sizeof(struct iwl3945_alive_resp));
3473
		pwork = &priv->alive_start;
3474
		iwl3945_disable_events(priv);
3475 3476 3477 3478 3479 3480 3481 3482 3483 3484 3485
	}

	/* We delay the ALIVE response by 5ms to
	 * give the HW RF Kill time to activate... */
	if (palive->is_valid == UCODE_VALID_OK)
		queue_delayed_work(priv->workqueue, pwork,
				   msecs_to_jiffies(5));
	else
		IWL_WARNING("uCode did not respond OK.\n");
}

3486 3487
static void iwl3945_rx_reply_add_sta(struct iwl3945_priv *priv,
				 struct iwl3945_rx_mem_buffer *rxb)
3488
{
3489
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3490 3491 3492 3493 3494

	IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
	return;
}

3495 3496
static void iwl3945_rx_reply_error(struct iwl3945_priv *priv,
			       struct iwl3945_rx_mem_buffer *rxb)
3497
{
3498
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3499 3500 3501 3502 3503 3504 3505 3506 3507 3508 3509 3510

	IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
		"seq 0x%04X ser 0x%08X\n",
		le32_to_cpu(pkt->u.err_resp.error_type),
		get_cmd_string(pkt->u.err_resp.cmd_id),
		pkt->u.err_resp.cmd_id,
		le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
		le32_to_cpu(pkt->u.err_resp.error_info));
}

#define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x

3511
static void iwl3945_rx_csa(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
3512
{
3513 3514 3515
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_rxon_cmd *rxon = (void *)&priv->active_rxon;
	struct iwl3945_csa_notification *csa = &(pkt->u.csa_notif);
3516 3517 3518 3519 3520 3521
	IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
		      le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
	rxon->channel = csa->channel;
	priv->staging_rxon.channel = csa->channel;
}

3522 3523
static void iwl3945_rx_spectrum_measure_notif(struct iwl3945_priv *priv,
					  struct iwl3945_rx_mem_buffer *rxb)
3524
{
3525
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3526 3527
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_spectrum_notification *report = &(pkt->u.spectrum_notif);
3528 3529 3530 3531 3532 3533 3534 3535 3536 3537 3538 3539

	if (!report->state) {
		IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
			  "Spectrum Measure Notification: Start\n");
		return;
	}

	memcpy(&priv->measure_report, report, sizeof(*report));
	priv->measurement_status |= MEASUREMENT_READY;
#endif
}

3540 3541
static void iwl3945_rx_pm_sleep_notif(struct iwl3945_priv *priv,
				  struct iwl3945_rx_mem_buffer *rxb)
3542
{
3543
#ifdef CONFIG_IWL3945_DEBUG
3544 3545
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_sleep_notification *sleep = &(pkt->u.sleep_notif);
3546 3547 3548 3549 3550
	IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
		     sleep->pm_sleep_mode, sleep->pm_wakeup_src);
#endif
}

3551 3552
static void iwl3945_rx_pm_debug_statistics_notif(struct iwl3945_priv *priv,
					     struct iwl3945_rx_mem_buffer *rxb)
3553
{
3554
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3555 3556 3557
	IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
			"notification for %s:\n",
			le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
3558
	iwl3945_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
3559 3560
}

3561
static void iwl3945_bg_beacon_update(struct work_struct *work)
3562
{
3563 3564
	struct iwl3945_priv *priv =
		container_of(work, struct iwl3945_priv, beacon_update);
3565 3566 3567 3568 3569 3570 3571 3572 3573 3574 3575 3576 3577 3578 3579 3580 3581 3582
	struct sk_buff *beacon;

	/* Pull updated AP beacon from mac80211. will fail if not in AP mode */
	beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);

	if (!beacon) {
		IWL_ERROR("update beacon failed\n");
		return;
	}

	mutex_lock(&priv->mutex);
	/* new beacon skb is allocated every time; dispose previous.*/
	if (priv->ibss_beacon)
		dev_kfree_skb(priv->ibss_beacon);

	priv->ibss_beacon = beacon;
	mutex_unlock(&priv->mutex);

3583
	iwl3945_send_beacon_cmd(priv);
3584 3585
}

3586 3587
static void iwl3945_rx_beacon_notif(struct iwl3945_priv *priv,
				struct iwl3945_rx_mem_buffer *rxb)
3588
{
3589
#ifdef CONFIG_IWL3945_DEBUG
3590 3591
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
3592 3593 3594 3595 3596 3597 3598 3599 3600 3601 3602 3603 3604 3605 3606 3607 3608
	u8 rate = beacon->beacon_notify_hdr.rate;

	IWL_DEBUG_RX("beacon status %x retries %d iss %d "
		"tsf %d %d rate %d\n",
		le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
		beacon->beacon_notify_hdr.failure_frame,
		le32_to_cpu(beacon->ibss_mgr_status),
		le32_to_cpu(beacon->high_tsf),
		le32_to_cpu(beacon->low_tsf), rate);
#endif

	if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
	    (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
		queue_work(priv->workqueue, &priv->beacon_update);
}

/* Service response to REPLY_SCAN_CMD (0x80) */
3609 3610
static void iwl3945_rx_reply_scan(struct iwl3945_priv *priv,
			      struct iwl3945_rx_mem_buffer *rxb)
3611
{
3612
#ifdef CONFIG_IWL3945_DEBUG
3613 3614 3615
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_scanreq_notification *notif =
	    (struct iwl3945_scanreq_notification *)pkt->u.raw;
3616 3617 3618 3619 3620 3621

	IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
#endif
}

/* Service SCAN_START_NOTIFICATION (0x82) */
3622 3623
static void iwl3945_rx_scan_start_notif(struct iwl3945_priv *priv,
				    struct iwl3945_rx_mem_buffer *rxb)
3624
{
3625 3626 3627
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_scanstart_notification *notif =
	    (struct iwl3945_scanstart_notification *)pkt->u.raw;
3628 3629 3630 3631 3632 3633 3634 3635 3636 3637 3638
	priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
	IWL_DEBUG_SCAN("Scan start: "
		       "%d [802.11%s] "
		       "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
		       notif->channel,
		       notif->band ? "bg" : "a",
		       notif->tsf_high,
		       notif->tsf_low, notif->status, notif->beacon_timer);
}

/* Service SCAN_RESULTS_NOTIFICATION (0x83) */
3639 3640
static void iwl3945_rx_scan_results_notif(struct iwl3945_priv *priv,
				      struct iwl3945_rx_mem_buffer *rxb)
3641
{
3642 3643 3644
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_scanresults_notification *notif =
	    (struct iwl3945_scanresults_notification *)pkt->u.raw;
3645 3646 3647 3648 3649 3650 3651 3652 3653 3654 3655 3656 3657 3658 3659 3660 3661 3662

	IWL_DEBUG_SCAN("Scan ch.res: "
		       "%d [802.11%s] "
		       "(TSF: 0x%08X:%08X) - %d "
		       "elapsed=%lu usec (%dms since last)\n",
		       notif->channel,
		       notif->band ? "bg" : "a",
		       le32_to_cpu(notif->tsf_high),
		       le32_to_cpu(notif->tsf_low),
		       le32_to_cpu(notif->statistics[0]),
		       le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
		       jiffies_to_msecs(elapsed_jiffies
					(priv->last_scan_jiffies, jiffies)));

	priv->last_scan_jiffies = jiffies;
}

/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
3663 3664
static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv,
				       struct iwl3945_rx_mem_buffer *rxb)
3665
{
3666 3667
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
	struct iwl3945_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
3668 3669 3670 3671 3672 3673 3674 3675 3676 3677 3678 3679 3680 3681 3682 3683 3684 3685 3686 3687 3688 3689 3690 3691 3692 3693 3694 3695 3696 3697 3698 3699 3700 3701 3702 3703 3704 3705 3706 3707 3708 3709 3710 3711 3712 3713 3714 3715 3716 3717 3718 3719

	IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
		       scan_notif->scanned_channels,
		       scan_notif->tsf_low,
		       scan_notif->tsf_high, scan_notif->status);

	/* The HW is no longer scanning */
	clear_bit(STATUS_SCAN_HW, &priv->status);

	/* The scan completion notification came in, so kill that timer... */
	cancel_delayed_work(&priv->scan_check);

	IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
		       (priv->scan_bands == 2) ? "2.4" : "5.2",
		       jiffies_to_msecs(elapsed_jiffies
					(priv->scan_pass_start, jiffies)));

	/* Remove this scanned band from the list
	 * of pending bands to scan */
	priv->scan_bands--;

	/* If a request to abort was given, or the scan did not succeed
	 * then we reset the scan state machine and terminate,
	 * re-queuing another scan if one has been requested */
	if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
		IWL_DEBUG_INFO("Aborted scan completed.\n");
		clear_bit(STATUS_SCAN_ABORTING, &priv->status);
	} else {
		/* If there are more bands on this scan pass reschedule */
		if (priv->scan_bands > 0)
			goto reschedule;
	}

	priv->last_scan_jiffies = jiffies;
	IWL_DEBUG_INFO("Setting scan to off\n");

	clear_bit(STATUS_SCANNING, &priv->status);

	IWL_DEBUG_INFO("Scan took %dms\n",
		jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));

	queue_work(priv->workqueue, &priv->scan_completed);

	return;

reschedule:
	priv->scan_pass_start = jiffies;
	queue_work(priv->workqueue, &priv->request_scan);
}

/* Handle notification from uCode that card's power state is changing
 * due to software, hardware, or critical temperature RFKILL */
3720 3721
static void iwl3945_rx_card_state_notif(struct iwl3945_priv *priv,
				    struct iwl3945_rx_mem_buffer *rxb)
3722
{
3723
	struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
3724 3725 3726 3727 3728 3729 3730
	u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
	unsigned long status = priv->status;

	IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
			  (flags & SW_CARD_DISABLED) ? "Kill" : "On");

3731
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_SET,
3732 3733 3734 3735 3736 3737 3738 3739 3740 3741 3742 3743 3744
		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);

	if (flags & HW_CARD_DISABLED)
		set_bit(STATUS_RF_KILL_HW, &priv->status);
	else
		clear_bit(STATUS_RF_KILL_HW, &priv->status);


	if (flags & SW_CARD_DISABLED)
		set_bit(STATUS_RF_KILL_SW, &priv->status);
	else
		clear_bit(STATUS_RF_KILL_SW, &priv->status);

3745
	iwl3945_scan_cancel(priv);
3746 3747 3748 3749 3750 3751 3752 3753 3754 3755 3756

	if ((test_bit(STATUS_RF_KILL_HW, &status) !=
	     test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
	    (test_bit(STATUS_RF_KILL_SW, &status) !=
	     test_bit(STATUS_RF_KILL_SW, &priv->status)))
		queue_work(priv->workqueue, &priv->rf_kill);
	else
		wake_up_interruptible(&priv->wait_command_queue);
}

/**
3757
 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
3758 3759 3760 3761 3762 3763 3764
 *
 * Setup the RX handlers for each of the reply types sent from the uCode
 * to the host.
 *
 * This function chains into the hardware specific files for them to setup
 * any hardware specific handlers as well.
 */
3765
static void iwl3945_setup_rx_handlers(struct iwl3945_priv *priv)
3766
{
3767 3768 3769 3770
	priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
	priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
	priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
	priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
3771
	priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
3772 3773
	    iwl3945_rx_spectrum_measure_notif;
	priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
3774
	priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
3775 3776
	    iwl3945_rx_pm_debug_statistics_notif;
	priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
3777

3778
	/* NOTE:  iwl3945_rx_statistics is different based on whether
3779 3780 3781 3782 3783 3784 3785
	 * the build is for the 3945 or the 4965.  See the
	 * corresponding implementation in iwl-XXXX.c
	 *
	 * The same handler is used for both the REPLY to a
	 * discrete statistics request from the host as well as
	 * for the periodic statistics notification from the uCode
	 */
3786 3787
	priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
	priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
3788

3789 3790
	priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
	priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
3791
	priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
3792
	    iwl3945_rx_scan_results_notif;
3793
	priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
3794 3795 3796
	    iwl3945_rx_scan_complete_notif;
	priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
	priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
3797 3798

	/* Setup hardware specific Rx handlers */
3799
	iwl3945_hw_rx_handler_setup(priv);
3800 3801 3802
}

/**
3803
 * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3804 3805 3806 3807 3808 3809
 * @rxb: Rx buffer to reclaim
 *
 * If an Rx buffer has an async callback associated with it the callback
 * will be executed.  The attached skb (if present) will only be freed
 * if the callback returns 1
 */
3810 3811
static void iwl3945_tx_cmd_complete(struct iwl3945_priv *priv,
				struct iwl3945_rx_mem_buffer *rxb)
3812
{
3813
	struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
3814 3815 3816 3817 3818
	u16 sequence = le16_to_cpu(pkt->hdr.sequence);
	int txq_id = SEQ_TO_QUEUE(sequence);
	int index = SEQ_TO_INDEX(sequence);
	int huge = sequence & SEQ_HUGE_FRAME;
	int cmd_index;
3819
	struct iwl3945_cmd *cmd;
3820 3821 3822 3823 3824 3825 3826 3827 3828 3829 3830 3831 3832 3833 3834 3835 3836 3837 3838 3839

	/* If a Tx command is being handled and it isn't in the actual
	 * command queue then there a command routing bug has been introduced
	 * in the queue management code. */
	if (txq_id != IWL_CMD_QUEUE_NUM)
		IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
			  txq_id, pkt->hdr.cmd);
	BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);

	cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
	cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];

	/* Input error checking is done when commands are added to queue. */
	if (cmd->meta.flags & CMD_WANT_SKB) {
		cmd->meta.source->u.skb = rxb->skb;
		rxb->skb = NULL;
	} else if (cmd->meta.u.callback &&
		   !cmd->meta.u.callback(priv, cmd, rxb->skb))
		rxb->skb = NULL;

3840
	iwl3945_tx_queue_reclaim(priv, txq_id, index);
3841 3842 3843 3844 3845 3846 3847 3848 3849 3850 3851 3852 3853 3854 3855 3856 3857 3858 3859 3860 3861 3862 3863 3864 3865 3866 3867 3868 3869 3870 3871 3872 3873 3874 3875 3876 3877 3878 3879 3880

	if (!(cmd->meta.flags & CMD_ASYNC)) {
		clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
		wake_up_interruptible(&priv->wait_command_queue);
	}
}

/************************** RX-FUNCTIONS ****************************/
/*
 * Rx theory of operation
 *
 * The host allocates 32 DMA target addresses and passes the host address
 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
 * 0 to 31
 *
 * Rx Queue Indexes
 * The host/firmware share two index registers for managing the Rx buffers.
 *
 * The READ index maps to the first position that the firmware may be writing
 * to -- the driver can read up to (but not including) this position and get
 * good data.
 * The READ index is managed by the firmware once the card is enabled.
 *
 * The WRITE index maps to the last position the driver has read from -- the
 * position preceding WRITE is the last slot the firmware can place a packet.
 *
 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
 * WRITE = READ.
 *
 * During initialization the host sets up the READ queue position to the first
 * INDEX position, and WRITE to the last (READ - 1 wrapped)
 *
 * When the firmware places a packet in a buffer it will advance the READ index
 * and fire the RX interrupt.  The driver can then query the READ index and
 * process as many packets as possible, moving the WRITE index forward as it
 * resets the Rx queue buffers with new memory.
 *
 * The management in the driver is as follows:
 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
 *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
3881
 *   to replenish the iwl->rxq->rx_free.
3882
 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
3883 3884 3885 3886 3887 3888 3889 3890 3891 3892 3893 3894
 *   iwl->rxq is replenished and the READ INDEX is updated (updating the
 *   'processed' and 'read' driver indexes as well)
 * + A received packet is processed and handed to the kernel network stack,
 *   detached from the iwl->rxq.  The driver 'processed' index is updated.
 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
 *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
 *   INDEX is not incremented and iwl->status(RX_STALLED) is set.  If there
 *   were enough free buffers and RX_STALLED is set it is cleared.
 *
 *
 * Driver sequence:
 *
3895 3896 3897 3898
 * iwl3945_rx_queue_alloc()       Allocates rx_free
 * iwl3945_rx_replenish()         Replenishes rx_free list from rx_used, and calls
 *                            iwl3945_rx_queue_restock
 * iwl3945_rx_queue_restock()     Moves available buffers from rx_free into Rx
3899 3900
 *                            queue, updates firmware pointers, and updates
 *                            the WRITE index.  If insufficient rx_free buffers
3901
 *                            are available, schedules iwl3945_rx_replenish
3902 3903
 *
 * -- enable interrupts --
3904
 * ISR - iwl3945_rx()             Detach iwl3945_rx_mem_buffers from pool up to the
3905 3906
 *                            READ INDEX, detaching the SKB from the pool.
 *                            Moves the packet buffer from queue to rx_used.
3907
 *                            Calls iwl3945_rx_queue_restock to refill any empty
3908 3909 3910 3911 3912 3913
 *                            slots.
 * ...
 *
 */

/**
3914
 * iwl3945_rx_queue_space - Return number of free slots available in queue.
3915
 */
3916
static int iwl3945_rx_queue_space(const struct iwl3945_rx_queue *q)
3917 3918 3919 3920 3921 3922 3923 3924 3925 3926 3927 3928
{
	int s = q->read - q->write;
	if (s <= 0)
		s += RX_QUEUE_SIZE;
	/* keep some buffer to not confuse full and empty queue */
	s -= 2;
	if (s < 0)
		s = 0;
	return s;
}

/**
3929
 * iwl3945_rx_queue_update_write_ptr - Update the write pointer for the RX queue
3930 3931 3932 3933 3934 3935 3936
 *
 * NOTE: This function has 3945 and 4965 specific code sections
 * but is declared in base due to the majority of the
 * implementation being the same (only a numeric constant is
 * different)
 *
 */
3937
int iwl3945_rx_queue_update_write_ptr(struct iwl3945_priv *priv, struct iwl3945_rx_queue *q)
3938 3939 3940 3941 3942 3943 3944 3945 3946 3947 3948
{
	u32 reg = 0;
	int rc = 0;
	unsigned long flags;

	spin_lock_irqsave(&q->lock, flags);

	if (q->need_update == 0)
		goto exit_unlock;

	if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3949
		reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
3950 3951

		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3952
			iwl3945_set_bit(priv, CSR_GP_CNTRL,
3953 3954 3955 3956
				    CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
			goto exit_unlock;
		}

3957
		rc = iwl3945_grab_nic_access(priv);
3958 3959 3960
		if (rc)
			goto exit_unlock;

3961
		iwl3945_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3962
				     q->write & ~0x7);
3963
		iwl3945_release_nic_access(priv);
3964
	} else
3965
		iwl3945_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3966 3967 3968 3969 3970 3971 3972 3973 3974 3975


	q->need_update = 0;

 exit_unlock:
	spin_unlock_irqrestore(&q->lock, flags);
	return rc;
}

/**
3976
 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
3977 3978 3979
 *
 * NOTE: This function has 3945 and 4965 specific code paths in it.
 */
3980
static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl3945_priv *priv,
3981 3982 3983 3984 3985 3986
					  dma_addr_t dma_addr)
{
	return cpu_to_le32((u32)dma_addr);
}

/**
3987
 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
3988 3989 3990 3991 3992 3993 3994 3995 3996
 *
 * If there are slots in the RX queue that  need to be restocked,
 * and we have free pre-allocated buffers, fill the ranks as much
 * as we can pulling from rx_free.
 *
 * This moves the 'write' index forward to catch up with 'processed', and
 * also updates the memory address in the firmware to reference the new
 * target buffer.
 */
3997
static int iwl3945_rx_queue_restock(struct iwl3945_priv *priv)
3998
{
3999
	struct iwl3945_rx_queue *rxq = &priv->rxq;
4000
	struct list_head *element;
4001
	struct iwl3945_rx_mem_buffer *rxb;
4002 4003 4004 4005 4006
	unsigned long flags;
	int write, rc;

	spin_lock_irqsave(&rxq->lock, flags);
	write = rxq->write & ~0x7;
4007
	while ((iwl3945_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
4008
		element = rxq->rx_free.next;
4009
		rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4010
		list_del(element);
4011
		rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->dma_addr);
4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028
		rxq->queue[rxq->write] = rxb;
		rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
		rxq->free_count--;
	}
	spin_unlock_irqrestore(&rxq->lock, flags);
	/* If the pre-allocated buffer pool is dropping low, schedule to
	 * refill it */
	if (rxq->free_count <= RX_LOW_WATERMARK)
		queue_work(priv->workqueue, &priv->rx_replenish);


	/* If we've added more space for the firmware to place data, tell it */
	if ((write != (rxq->write & ~0x7))
	    || (abs(rxq->write - rxq->read) > 7)) {
		spin_lock_irqsave(&rxq->lock, flags);
		rxq->need_update = 1;
		spin_unlock_irqrestore(&rxq->lock, flags);
4029
		rc = iwl3945_rx_queue_update_write_ptr(priv, rxq);
4030 4031 4032 4033 4034 4035 4036 4037
		if (rc)
			return rc;
	}

	return 0;
}

/**
4038
 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
4039 4040 4041
 *
 * When moving to rx_free an SKB is allocated for the slot.
 *
4042
 * Also restock the Rx queue via iwl3945_rx_queue_restock.
4043
 * This is called as a scheduled work item (except for during initialization)
4044
 */
4045
void iwl3945_rx_replenish(void *data)
4046
{
4047 4048
	struct iwl3945_priv *priv = data;
	struct iwl3945_rx_queue *rxq = &priv->rxq;
4049
	struct list_head *element;
4050
	struct iwl3945_rx_mem_buffer *rxb;
4051 4052 4053 4054
	unsigned long flags;
	spin_lock_irqsave(&rxq->lock, flags);
	while (!list_empty(&rxq->rx_used)) {
		element = rxq->rx_used.next;
4055
		rxb = list_entry(element, struct iwl3945_rx_mem_buffer, list);
4056 4057 4058 4059 4060 4061 4062 4063 4064 4065 4066 4067 4068 4069 4070 4071 4072 4073 4074 4075 4076 4077
		rxb->skb =
		    alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
		if (!rxb->skb) {
			if (net_ratelimit())
				printk(KERN_CRIT DRV_NAME
				       ": Can not allocate SKB buffers\n");
			/* We don't reschedule replenish work here -- we will
			 * call the restock method and if it still needs
			 * more buffers it will schedule replenish */
			break;
		}
		priv->alloc_rxb_skb++;
		list_del(element);
		rxb->dma_addr =
		    pci_map_single(priv->pci_dev, rxb->skb->data,
				   IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
		list_add_tail(&rxb->list, &rxq->rx_free);
		rxq->free_count++;
	}
	spin_unlock_irqrestore(&rxq->lock, flags);

	spin_lock_irqsave(&priv->lock, flags);
4078
	iwl3945_rx_queue_restock(priv);
4079 4080 4081 4082 4083 4084 4085 4086
	spin_unlock_irqrestore(&priv->lock, flags);
}

/* Assumes that the skb field of the buffers in 'pool' is kept accurate.
 * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
 * This free routine walks the list of POOL entries and if SKB is set to
 * non NULL it is unmapped and freed
 */
4087
static void iwl3945_rx_queue_free(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4088 4089 4090 4091 4092 4093 4094 4095 4096 4097 4098 4099 4100 4101 4102 4103
{
	int i;
	for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
		if (rxq->pool[i].skb != NULL) {
			pci_unmap_single(priv->pci_dev,
					 rxq->pool[i].dma_addr,
					 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
			dev_kfree_skb(rxq->pool[i].skb);
		}
	}

	pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
			    rxq->dma_addr);
	rxq->bd = NULL;
}

4104
int iwl3945_rx_queue_alloc(struct iwl3945_priv *priv)
4105
{
4106
	struct iwl3945_rx_queue *rxq = &priv->rxq;
4107 4108 4109 4110 4111 4112 4113 4114 4115 4116 4117 4118 4119 4120 4121 4122 4123 4124 4125 4126
	struct pci_dev *dev = priv->pci_dev;
	int i;

	spin_lock_init(&rxq->lock);
	INIT_LIST_HEAD(&rxq->rx_free);
	INIT_LIST_HEAD(&rxq->rx_used);
	rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
	if (!rxq->bd)
		return -ENOMEM;
	/* Fill the rx_used queue with _all_ of the Rx buffers */
	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
	/* Set us so that we have processed and used all buffers, but have
	 * not restocked the Rx queue with fresh buffers */
	rxq->read = rxq->write = 0;
	rxq->free_count = 0;
	rxq->need_update = 0;
	return 0;
}

4127
void iwl3945_rx_queue_reset(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
4128 4129 4130 4131 4132 4133 4134 4135 4136 4137 4138 4139 4140 4141 4142 4143 4144 4145 4146 4147 4148 4149 4150 4151 4152 4153 4154 4155 4156 4157 4158 4159 4160 4161 4162 4163 4164 4165 4166 4167 4168 4169 4170 4171 4172 4173
{
	unsigned long flags;
	int i;
	spin_lock_irqsave(&rxq->lock, flags);
	INIT_LIST_HEAD(&rxq->rx_free);
	INIT_LIST_HEAD(&rxq->rx_used);
	/* Fill the rx_used queue with _all_ of the Rx buffers */
	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
		/* In the reset function, these buffers may have been allocated
		 * to an SKB, so we need to unmap and free potential storage */
		if (rxq->pool[i].skb != NULL) {
			pci_unmap_single(priv->pci_dev,
					 rxq->pool[i].dma_addr,
					 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
			priv->alloc_rxb_skb--;
			dev_kfree_skb(rxq->pool[i].skb);
			rxq->pool[i].skb = NULL;
		}
		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
	}

	/* Set us so that we have processed and used all buffers, but have
	 * not restocked the Rx queue with fresh buffers */
	rxq->read = rxq->write = 0;
	rxq->free_count = 0;
	spin_unlock_irqrestore(&rxq->lock, flags);
}

/* Convert linear signal-to-noise ratio into dB */
static u8 ratio2dB[100] = {
/*	 0   1   2   3   4   5   6   7   8   9 */
	 0,  0,  6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
	20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
	26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
	29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
	32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
	34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
	36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
	37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
	38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
	39, 39, 39, 39, 39, 40, 40, 40, 40, 40  /* 90 - 99 */
};

/* Calculates a relative dB value from a ratio of linear
 *   (i.e. not dB) signal levels.
 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
4174
int iwl3945_calc_db_from_ratio(int sig_ratio)
4175 4176 4177 4178 4179 4180 4181 4182 4183 4184 4185 4186 4187 4188 4189 4190 4191 4192 4193 4194 4195 4196 4197 4198 4199
{
	/* Anything above 1000:1 just report as 60 dB */
	if (sig_ratio > 1000)
		return 60;

	/* Above 100:1, divide by 10 and use table,
	 *   add 20 dB to make up for divide by 10 */
	if (sig_ratio > 100)
		return (20 + (int)ratio2dB[sig_ratio/10]);

	/* We shouldn't see this */
	if (sig_ratio < 1)
		return 0;

	/* Use table for ratios 1:1 - 99:1 */
	return (int)ratio2dB[sig_ratio];
}

#define PERFECT_RSSI (-20) /* dBm */
#define WORST_RSSI (-95)   /* dBm */
#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)

/* Calculate an indication of rx signal quality (a percentage, not dBm!).
 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
 *   about formulas used below. */
4200
int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
4201 4202 4203 4204 4205 4206 4207 4208 4209 4210 4211 4212 4213 4214 4215 4216 4217 4218 4219 4220 4221 4222 4223 4224 4225 4226 4227 4228 4229 4230 4231 4232 4233 4234
{
	int sig_qual;
	int degradation = PERFECT_RSSI - rssi_dbm;

	/* If we get a noise measurement, use signal-to-noise ratio (SNR)
	 * as indicator; formula is (signal dbm - noise dbm).
	 * SNR at or above 40 is a great signal (100%).
	 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
	 * Weakest usable signal is usually 10 - 15 dB SNR. */
	if (noise_dbm) {
		if (rssi_dbm - noise_dbm >= 40)
			return 100;
		else if (rssi_dbm < noise_dbm)
			return 0;
		sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;

	/* Else use just the signal level.
	 * This formula is a least squares fit of data points collected and
	 *   compared with a reference system that had a percentage (%) display
	 *   for signal quality. */
	} else
		sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
			    (15 * RSSI_RANGE + 62 * degradation)) /
			   (RSSI_RANGE * RSSI_RANGE);

	if (sig_qual > 100)
		sig_qual = 100;
	else if (sig_qual < 1)
		sig_qual = 0;

	return sig_qual;
}

/**
4235
 * iwl3945_rx_handle - Main entry function for receiving responses from the uCode
4236 4237 4238 4239 4240
 *
 * Uses the priv->rx_handlers callback function array to invoke
 * the appropriate handlers, including command responses,
 * frame-received notifications, and other notifications.
 */
4241
static void iwl3945_rx_handle(struct iwl3945_priv *priv)
4242
{
4243 4244 4245
	struct iwl3945_rx_mem_buffer *rxb;
	struct iwl3945_rx_packet *pkt;
	struct iwl3945_rx_queue *rxq = &priv->rxq;
4246 4247 4248 4249
	u32 r, i;
	int reclaim;
	unsigned long flags;

4250
	r = iwl3945_hw_get_rx_read(priv);
4251 4252 4253 4254 4255 4256 4257 4258 4259 4260 4261 4262 4263 4264 4265 4266 4267 4268 4269
	i = rxq->read;

	/* Rx interrupt, but nothing sent from uCode */
	if (i == r)
		IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);

	while (i != r) {
		rxb = rxq->queue[i];

		/* If an RXB doesn't have a queue slot associated with it
		 * then a bug has been introduced in the queue refilling
		 * routines -- catch it here */
		BUG_ON(rxb == NULL);

		rxq->queue[i] = NULL;

		pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
					    IWL_RX_BUF_SIZE,
					    PCI_DMA_FROMDEVICE);
4270
		pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
4271 4272 4273 4274 4275 4276 4277 4278 4279 4280 4281 4282 4283

		/* Reclaim a command buffer only if this packet is a response
		 *   to a (driver-originated) command.
		 * If the packet (e.g. Rx frame) originated from uCode,
		 *   there is no command buffer to reclaim.
		 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
		 *   but apparently a few don't get set; catch them here. */
		reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
			(pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
			(pkt->hdr.cmd != REPLY_TX);

		/* Based on type of command response or notification,
		 *   handle those that need handling via function in
4284
		 *   rx_handlers table.  See iwl3945_setup_rx_handlers() */
4285 4286 4287 4288 4289 4290 4291 4292 4293 4294 4295 4296 4297 4298 4299
		if (priv->rx_handlers[pkt->hdr.cmd]) {
			IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
				"r = %d, i = %d, %s, 0x%02x\n", r, i,
				get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
			priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
		} else {
			/* No handling needed */
			IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
				"r %d i %d No handler needed for %s, 0x%02x\n",
				r, i, get_cmd_string(pkt->hdr.cmd),
				pkt->hdr.cmd);
		}

		if (reclaim) {
			/* Invoke any callbacks, transfer the skb to caller,
4300
			 * and fire off the (possibly) blocking iwl3945_send_cmd()
4301 4302
			 * as we reclaim the driver command queue */
			if (rxb && rxb->skb)
4303
				iwl3945_tx_cmd_complete(priv, rxb);
4304 4305 4306 4307 4308 4309 4310 4311 4312 4313 4314 4315 4316 4317 4318 4319 4320 4321 4322 4323 4324 4325 4326
			else
				IWL_WARNING("Claim null rxb?\n");
		}

		/* For now we just don't re-use anything.  We can tweak this
		 * later to try and re-use notification packets and SKBs that
		 * fail to Rx correctly */
		if (rxb->skb != NULL) {
			priv->alloc_rxb_skb--;
			dev_kfree_skb_any(rxb->skb);
			rxb->skb = NULL;
		}

		pci_unmap_single(priv->pci_dev, rxb->dma_addr,
				 IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
		spin_lock_irqsave(&rxq->lock, flags);
		list_add_tail(&rxb->list, &priv->rxq.rx_used);
		spin_unlock_irqrestore(&rxq->lock, flags);
		i = (i + 1) & RX_QUEUE_MASK;
	}

	/* Backtrack one entry */
	priv->rxq.read = i;
4327
	iwl3945_rx_queue_restock(priv);
4328 4329
}

4330 4331
static int iwl3945_tx_queue_update_write_ptr(struct iwl3945_priv *priv,
				  struct iwl3945_tx_queue *txq)
4332 4333 4334 4335 4336 4337 4338 4339 4340 4341 4342 4343 4344
{
	u32 reg = 0;
	int rc = 0;
	int txq_id = txq->q.id;

	if (txq->need_update == 0)
		return rc;

	/* if we're trying to save power */
	if (test_bit(STATUS_POWER_PMI, &priv->status)) {
		/* wake up nic if it's powered down ...
		 * uCode will wake up, and interrupt us again, so next
		 * time we'll skip this part. */
4345
		reg = iwl3945_read32(priv, CSR_UCODE_DRV_GP1);
4346 4347 4348

		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
			IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4349
			iwl3945_set_bit(priv, CSR_GP_CNTRL,
4350 4351 4352 4353 4354
				    CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
			return rc;
		}

		/* restore this queue's parameters in nic hardware. */
4355
		rc = iwl3945_grab_nic_access(priv);
4356 4357
		if (rc)
			return rc;
4358
		iwl3945_write_direct32(priv, HBUS_TARG_WRPTR,
4359
				     txq->q.write_ptr | (txq_id << 8));
4360
		iwl3945_release_nic_access(priv);
4361 4362 4363 4364

	/* else not in power-save mode, uCode will never sleep when we're
	 * trying to tx (during RFKILL, we're not trying to tx). */
	} else
4365
		iwl3945_write32(priv, HBUS_TARG_WRPTR,
4366
			    txq->q.write_ptr | (txq_id << 8));
4367 4368 4369 4370 4371 4372

	txq->need_update = 0;

	return rc;
}

4373
#ifdef CONFIG_IWL3945_DEBUG
4374
static void iwl3945_print_rx_config_cmd(struct iwl3945_rxon_cmd *rxon)
4375
{
4376 4377
	DECLARE_MAC_BUF(mac);

4378
	IWL_DEBUG_RADIO("RX CONFIG:\n");
4379
	iwl3945_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4380 4381 4382 4383 4384 4385 4386 4387
	IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
	IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
	IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
			le32_to_cpu(rxon->filter_flags));
	IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
	IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
			rxon->ofdm_basic_rates);
	IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4388 4389 4390 4391
	IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
			print_mac(mac, rxon->node_addr));
	IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
			print_mac(mac, rxon->bssid_addr));
4392 4393 4394 4395
	IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
}
#endif

4396
static void iwl3945_enable_interrupts(struct iwl3945_priv *priv)
4397 4398 4399
{
	IWL_DEBUG_ISR("Enabling interrupts\n");
	set_bit(STATUS_INT_ENABLED, &priv->status);
4400
	iwl3945_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4401 4402
}

4403
static inline void iwl3945_disable_interrupts(struct iwl3945_priv *priv)
4404 4405 4406 4407
{
	clear_bit(STATUS_INT_ENABLED, &priv->status);

	/* disable interrupts from uCode/NIC to host */
4408
	iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4409 4410 4411

	/* acknowledge/clear/reset any interrupts still pending
	 * from uCode or flow handler (Rx/Tx DMA) */
4412 4413
	iwl3945_write32(priv, CSR_INT, 0xffffffff);
	iwl3945_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4414 4415 4416 4417 4418 4419 4420 4421 4422 4423 4424 4425 4426 4427 4428 4429 4430 4431 4432 4433 4434 4435 4436 4437 4438 4439
	IWL_DEBUG_ISR("Disabled interrupts\n");
}

static const char *desc_lookup(int i)
{
	switch (i) {
	case 1:
		return "FAIL";
	case 2:
		return "BAD_PARAM";
	case 3:
		return "BAD_CHECKSUM";
	case 4:
		return "NMI_INTERRUPT";
	case 5:
		return "SYSASSERT";
	case 6:
		return "FATAL_ERROR";
	}

	return "UNKNOWN";
}

#define ERROR_START_OFFSET  (1 * sizeof(u32))
#define ERROR_ELEM_SIZE     (7 * sizeof(u32))

4440
static void iwl3945_dump_nic_error_log(struct iwl3945_priv *priv)
4441 4442 4443 4444 4445 4446 4447 4448
{
	u32 i;
	u32 desc, time, count, base, data1;
	u32 blink1, blink2, ilink1, ilink2;
	int rc;

	base = le32_to_cpu(priv->card_alive.error_event_table_ptr);

4449
	if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4450 4451 4452 4453
		IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
		return;
	}

4454
	rc = iwl3945_grab_nic_access(priv);
4455 4456 4457 4458 4459
	if (rc) {
		IWL_WARNING("Can not read from adapter at this time.\n");
		return;
	}

4460
	count = iwl3945_read_targ_mem(priv, base);
4461 4462 4463 4464 4465 4466 4467 4468 4469 4470 4471 4472

	if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
		IWL_ERROR("Start IWL Error Log Dump:\n");
		IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
			  priv->status, priv->config, count);
	}

	IWL_ERROR("Desc       Time       asrtPC  blink2 "
		  "ilink1  nmiPC   Line\n");
	for (i = ERROR_START_OFFSET;
	     i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
	     i += ERROR_ELEM_SIZE) {
4473
		desc = iwl3945_read_targ_mem(priv, base + i);
4474
		time =
4475
		    iwl3945_read_targ_mem(priv, base + i + 1 * sizeof(u32));
4476
		blink1 =
4477
		    iwl3945_read_targ_mem(priv, base + i + 2 * sizeof(u32));
4478
		blink2 =
4479
		    iwl3945_read_targ_mem(priv, base + i + 3 * sizeof(u32));
4480
		ilink1 =
4481
		    iwl3945_read_targ_mem(priv, base + i + 4 * sizeof(u32));
4482
		ilink2 =
4483
		    iwl3945_read_targ_mem(priv, base + i + 5 * sizeof(u32));
4484
		data1 =
4485
		    iwl3945_read_targ_mem(priv, base + i + 6 * sizeof(u32));
4486 4487 4488 4489 4490 4491 4492

		IWL_ERROR
		    ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
		     desc_lookup(desc), desc, time, blink1, blink2,
		     ilink1, ilink2, data1);
	}

4493
	iwl3945_release_nic_access(priv);
4494 4495 4496 4497 4498 4499

}

#define EVENT_START_OFFSET  (4 * sizeof(u32))

/**
4500
 * iwl3945_print_event_log - Dump error event log to syslog
4501
 *
4502
 * NOTE: Must be called with iwl3945_grab_nic_access() already obtained!
4503
 */
4504
static void iwl3945_print_event_log(struct iwl3945_priv *priv, u32 start_idx,
4505 4506 4507 4508 4509 4510 4511 4512 4513 4514 4515 4516 4517 4518 4519 4520 4521 4522 4523 4524 4525 4526 4527
				u32 num_events, u32 mode)
{
	u32 i;
	u32 base;       /* SRAM byte address of event log header */
	u32 event_size;	/* 2 u32s, or 3 u32s if timestamp recorded */
	u32 ptr;        /* SRAM byte address of log data */
	u32 ev, time, data; /* event log data */

	if (num_events == 0)
		return;

	base = le32_to_cpu(priv->card_alive.log_event_table_ptr);

	if (mode == 0)
		event_size = 2 * sizeof(u32);
	else
		event_size = 3 * sizeof(u32);

	ptr = base + EVENT_START_OFFSET + (start_idx * event_size);

	/* "time" is actually "data" for mode 0 (no timestamp).
	 * place event id # at far right for easier visual parsing. */
	for (i = 0; i < num_events; i++) {
4528
		ev = iwl3945_read_targ_mem(priv, ptr);
4529
		ptr += sizeof(u32);
4530
		time = iwl3945_read_targ_mem(priv, ptr);
4531 4532 4533 4534
		ptr += sizeof(u32);
		if (mode == 0)
			IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
		else {
4535
			data = iwl3945_read_targ_mem(priv, ptr);
4536 4537 4538 4539 4540 4541
			ptr += sizeof(u32);
			IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
		}
	}
}

4542
static void iwl3945_dump_nic_event_log(struct iwl3945_priv *priv)
4543 4544 4545 4546 4547 4548 4549 4550 4551 4552
{
	int rc;
	u32 base;       /* SRAM byte address of event log header */
	u32 capacity;   /* event log capacity in # entries */
	u32 mode;       /* 0 - no timestamp, 1 - timestamp recorded */
	u32 num_wraps;  /* # times uCode wrapped to top of log */
	u32 next_entry; /* index of next entry to be written by uCode */
	u32 size;       /* # entries that we'll print */

	base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
4553
	if (!iwl3945_hw_valid_rtc_data_addr(base)) {
4554 4555 4556 4557
		IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
		return;
	}

4558
	rc = iwl3945_grab_nic_access(priv);
4559 4560 4561 4562 4563 4564
	if (rc) {
		IWL_WARNING("Can not read from adapter at this time.\n");
		return;
	}

	/* event log header */
4565 4566 4567 4568
	capacity = iwl3945_read_targ_mem(priv, base);
	mode = iwl3945_read_targ_mem(priv, base + (1 * sizeof(u32)));
	num_wraps = iwl3945_read_targ_mem(priv, base + (2 * sizeof(u32)));
	next_entry = iwl3945_read_targ_mem(priv, base + (3 * sizeof(u32)));
4569 4570 4571 4572 4573

	size = num_wraps ? capacity : next_entry;

	/* bail out if nothing in log */
	if (size == 0) {
4574
		IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4575
		iwl3945_release_nic_access(priv);
4576 4577 4578
		return;
	}

4579
	IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
4580 4581 4582 4583 4584
		  size, num_wraps);

	/* if uCode has wrapped back to top of log, start at the oldest entry,
	 * i.e the next one that uCode would fill. */
	if (num_wraps)
4585
		iwl3945_print_event_log(priv, next_entry,
4586 4587 4588
				    capacity - next_entry, mode);

	/* (then/else) start at top of log */
4589
	iwl3945_print_event_log(priv, 0, next_entry, mode);
4590

4591
	iwl3945_release_nic_access(priv);
4592 4593 4594
}

/**
4595
 * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
4596
 */
4597
static void iwl3945_irq_handle_error(struct iwl3945_priv *priv)
4598
{
4599
	/* Set the FW error flag -- cleared on iwl3945_down */
4600 4601 4602 4603 4604
	set_bit(STATUS_FW_ERROR, &priv->status);

	/* Cancel currently queued command. */
	clear_bit(STATUS_HCMD_ACTIVE, &priv->status);

4605
#ifdef CONFIG_IWL3945_DEBUG
4606 4607 4608 4609
	if (iwl3945_debug_level & IWL_DL_FW_ERRORS) {
		iwl3945_dump_nic_error_log(priv);
		iwl3945_dump_nic_event_log(priv);
		iwl3945_print_rx_config_cmd(&priv->staging_rxon);
4610 4611 4612 4613 4614 4615 4616 4617 4618 4619 4620 4621 4622
	}
#endif

	wake_up_interruptible(&priv->wait_command_queue);

	/* Keep the restart process from trying to send host
	 * commands by clearing the INIT status bit */
	clear_bit(STATUS_READY, &priv->status);

	if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
		IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
			  "Restarting adapter due to uCode error.\n");

4623
		if (iwl3945_is_associated(priv)) {
4624 4625 4626 4627 4628 4629 4630 4631
			memcpy(&priv->recovery_rxon, &priv->active_rxon,
			       sizeof(priv->recovery_rxon));
			priv->error_recovering = 1;
		}
		queue_work(priv->workqueue, &priv->restart);
	}
}

4632
static void iwl3945_error_recovery(struct iwl3945_priv *priv)
4633 4634 4635 4636 4637 4638
{
	unsigned long flags;

	memcpy(&priv->staging_rxon, &priv->recovery_rxon,
	       sizeof(priv->staging_rxon));
	priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
4639
	iwl3945_commit_rxon(priv);
4640

4641
	iwl3945_add_station(priv, priv->bssid, 1, 0);
4642 4643 4644 4645 4646 4647 4648

	spin_lock_irqsave(&priv->lock, flags);
	priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
	priv->error_recovering = 0;
	spin_unlock_irqrestore(&priv->lock, flags);
}

4649
static void iwl3945_irq_tasklet(struct iwl3945_priv *priv)
4650 4651 4652 4653
{
	u32 inta, handled = 0;
	u32 inta_fh;
	unsigned long flags;
4654
#ifdef CONFIG_IWL3945_DEBUG
4655 4656 4657 4658 4659 4660 4661 4662
	u32 inta_mask;
#endif

	spin_lock_irqsave(&priv->lock, flags);

	/* Ack/clear/reset pending uCode interrupts.
	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
4663 4664
	inta = iwl3945_read32(priv, CSR_INT);
	iwl3945_write32(priv, CSR_INT, inta);
4665 4666 4667 4668

	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
	 * Any new interrupts that happen after this, either while we're
	 * in this tasklet, or later, will show up in next ISR/tasklet. */
4669 4670
	inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
	iwl3945_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4671

4672
#ifdef CONFIG_IWL3945_DEBUG
4673 4674
	if (iwl3945_debug_level & IWL_DL_ISR) {
		inta_mask = iwl3945_read32(priv, CSR_INT_MASK); /* just for debug */
4675 4676 4677 4678 4679 4680 4681 4682 4683 4684 4685 4686 4687 4688 4689 4690 4691 4692 4693
		IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
			      inta, inta_mask, inta_fh);
	}
#endif

	/* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
	 * atomic, make sure that inta covers all the interrupts that
	 * we've discovered, even if FH interrupt came in just after
	 * reading CSR_INT. */
	if (inta_fh & CSR_FH_INT_RX_MASK)
		inta |= CSR_INT_BIT_FH_RX;
	if (inta_fh & CSR_FH_INT_TX_MASK)
		inta |= CSR_INT_BIT_FH_TX;

	/* Now service all interrupt bits discovered above. */
	if (inta & CSR_INT_BIT_HW_ERR) {
		IWL_ERROR("Microcode HW error detected.  Restarting.\n");

		/* Tell the device to stop sending interrupts */
4694
		iwl3945_disable_interrupts(priv);
4695

4696
		iwl3945_irq_handle_error(priv);
4697 4698 4699 4700 4701 4702 4703 4704

		handled |= CSR_INT_BIT_HW_ERR;

		spin_unlock_irqrestore(&priv->lock, flags);

		return;
	}

4705
#ifdef CONFIG_IWL3945_DEBUG
4706
	if (iwl3945_debug_level & (IWL_DL_ISR)) {
4707 4708 4709 4710 4711 4712 4713 4714 4715 4716 4717 4718 4719 4720 4721
		/* NIC fires this, but we don't use it, redundant with WAKEUP */
		if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
			IWL_DEBUG_ISR("Microcode started or stopped.\n");

		/* Alive notification via Rx interrupt will do the real work */
		if (inta & CSR_INT_BIT_ALIVE)
			IWL_DEBUG_ISR("Alive interrupt\n");
	}
#endif
	/* Safely ignore these bits for debug checks below */
	inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);

	/* HW RF KILL switch toggled (4965 only) */
	if (inta & CSR_INT_BIT_RF_KILL) {
		int hw_rf_kill = 0;
4722
		if (!(iwl3945_read32(priv, CSR_GP_CNTRL) &
4723 4724 4725 4726 4727 4728 4729 4730 4731 4732 4733
				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
			hw_rf_kill = 1;

		IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
				"RF_KILL bit toggled to %s.\n",
				hw_rf_kill ? "disable radio":"enable radio");

		/* Queue restart only if RF_KILL switch was set to "kill"
		 *   when we loaded driver, and is now set to "enable".
		 * After we're Alive, RF_KILL gets handled by
		 *   iwl_rx_card_state_notif() */
4734 4735
		if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
			clear_bit(STATUS_RF_KILL_HW, &priv->status);
4736
			queue_work(priv->workqueue, &priv->restart);
4737
		}
4738 4739 4740 4741 4742 4743 4744 4745 4746 4747 4748 4749 4750 4751

		handled |= CSR_INT_BIT_RF_KILL;
	}

	/* Chip got too hot and stopped itself (4965 only) */
	if (inta & CSR_INT_BIT_CT_KILL) {
		IWL_ERROR("Microcode CT kill error detected.\n");
		handled |= CSR_INT_BIT_CT_KILL;
	}

	/* Error detected by uCode */
	if (inta & CSR_INT_BIT_SW_ERR) {
		IWL_ERROR("Microcode SW error detected.  Restarting 0x%X.\n",
			  inta);
4752
		iwl3945_irq_handle_error(priv);
4753 4754 4755 4756 4757 4758
		handled |= CSR_INT_BIT_SW_ERR;
	}

	/* uCode wakes up after power-down sleep */
	if (inta & CSR_INT_BIT_WAKEUP) {
		IWL_DEBUG_ISR("Wakeup interrupt\n");
4759 4760 4761 4762 4763 4764 4765
		iwl3945_rx_queue_update_write_ptr(priv, &priv->rxq);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[0]);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[1]);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[2]);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[3]);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[4]);
		iwl3945_tx_queue_update_write_ptr(priv, &priv->txq[5]);
4766 4767 4768 4769 4770 4771 4772 4773

		handled |= CSR_INT_BIT_WAKEUP;
	}

	/* All uCode command responses, including Tx command responses,
	 * Rx "responses" (frame-received notification), and other
	 * notifications from uCode come through here*/
	if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4774
		iwl3945_rx_handle(priv);
4775 4776 4777 4778 4779 4780
		handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
	}

	if (inta & CSR_INT_BIT_FH_TX) {
		IWL_DEBUG_ISR("Tx interrupt\n");

4781 4782 4783
		iwl3945_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
		if (!iwl3945_grab_nic_access(priv)) {
			iwl3945_write_direct32(priv,
4784 4785
					     FH_TCSR_CREDIT
					     (ALM_FH_SRVC_CHNL), 0x0);
4786
			iwl3945_release_nic_access(priv);
4787 4788 4789 4790 4791 4792 4793 4794 4795 4796 4797 4798 4799 4800
		}
		handled |= CSR_INT_BIT_FH_TX;
	}

	if (inta & ~handled)
		IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);

	if (inta & ~CSR_INI_SET_MASK) {
		IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
			 inta & ~CSR_INI_SET_MASK);
		IWL_WARNING("   with FH_INT = 0x%08x\n", inta_fh);
	}

	/* Re-enable all interrupts */
4801
	iwl3945_enable_interrupts(priv);
4802

4803
#ifdef CONFIG_IWL3945_DEBUG
4804 4805 4806 4807
	if (iwl3945_debug_level & (IWL_DL_ISR)) {
		inta = iwl3945_read32(priv, CSR_INT);
		inta_mask = iwl3945_read32(priv, CSR_INT_MASK);
		inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4808 4809 4810 4811 4812 4813 4814
		IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
			"flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
	}
#endif
	spin_unlock_irqrestore(&priv->lock, flags);
}

4815
static irqreturn_t iwl3945_isr(int irq, void *data)
4816
{
4817
	struct iwl3945_priv *priv = data;
4818 4819 4820 4821 4822 4823 4824 4825 4826 4827 4828
	u32 inta, inta_mask;
	u32 inta_fh;
	if (!priv)
		return IRQ_NONE;

	spin_lock(&priv->lock);

	/* Disable (but don't clear!) interrupts here to avoid
	 *    back-to-back ISRs and sporadic interrupts from our NIC.
	 * If we have something to service, the tasklet will re-enable ints.
	 * If we *don't* have something, we'll re-enable before leaving here. */
4829 4830
	inta_mask = iwl3945_read32(priv, CSR_INT_MASK);  /* just for debug */
	iwl3945_write32(priv, CSR_INT_MASK, 0x00000000);
4831 4832

	/* Discover which interrupts are active/pending */
4833 4834
	inta = iwl3945_read32(priv, CSR_INT);
	inta_fh = iwl3945_read32(priv, CSR_FH_INT_STATUS);
4835 4836 4837 4838 4839 4840 4841 4842 4843 4844 4845 4846

	/* Ignore interrupt if there's nothing in NIC to service.
	 * This may be due to IRQ shared with another device,
	 * or due to sporadic interrupts thrown from our NIC. */
	if (!inta && !inta_fh) {
		IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
		goto none;
	}

	if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
		/* Hardware disappeared */
		IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
4847
		goto unplugged;
4848 4849 4850 4851 4852
	}

	IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
		      inta, inta_mask, inta_fh);

4853
	/* iwl3945_irq_tasklet() will service interrupts and re-enable them */
4854
	tasklet_schedule(&priv->irq_tasklet);
4855
unplugged:
4856 4857 4858 4859 4860 4861
	spin_unlock(&priv->lock);

	return IRQ_HANDLED;

 none:
	/* re-enable interrupts here since we don't have anything to service. */
4862
	iwl3945_enable_interrupts(priv);
4863 4864 4865 4866 4867 4868
	spin_unlock(&priv->lock);
	return IRQ_NONE;
}

/************************** EEPROM BANDS ****************************
 *
4869
 * The iwl3945_eeprom_band definitions below provide the mapping from the
4870 4871 4872
 * EEPROM contents to the specific channel number supported for each
 * band.
 *
4873
 * For example, iwl3945_priv->eeprom.band_3_channels[4] from the band_3
4874 4875 4876 4877 4878 4879 4880 4881 4882 4883 4884 4885 4886 4887 4888 4889 4890 4891 4892 4893 4894 4895 4896 4897 4898
 * definition below maps to physical channel 42 in the 5.2GHz spectrum.
 * The specific geography and calibration information for that channel
 * is contained in the eeprom map itself.
 *
 * During init, we copy the eeprom information and channel map
 * information into priv->channel_info_24/52 and priv->channel_map_24/52
 *
 * channel_map_24/52 provides the index in the channel_info array for a
 * given channel.  We have to have two separate maps as there is channel
 * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
 * band_2
 *
 * A value of 0xff stored in the channel_map indicates that the channel
 * is not supported by the hardware at all.
 *
 * A value of 0xfe in the channel_map indicates that the channel is not
 * valid for Tx with the current hardware.  This means that
 * while the system can tune and receive on a given channel, it may not
 * be able to associate or transmit any frames on that
 * channel.  There is no corresponding channel information for that
 * entry.
 *
 *********************************************************************/

/* 2.4 GHz */
4899
static const u8 iwl3945_eeprom_band_1[14] = {
4900 4901 4902 4903
	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
};

/* 5.2 GHz bands */
4904
static const u8 iwl3945_eeprom_band_2[] = {
4905 4906 4907
	183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
};

4908
static const u8 iwl3945_eeprom_band_3[] = {	/* 5205-5320MHz */
4909 4910 4911
	34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
};

4912
static const u8 iwl3945_eeprom_band_4[] = {	/* 5500-5700MHz */
4913 4914 4915
	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
};

4916
static const u8 iwl3945_eeprom_band_5[] = {	/* 5725-5825MHz */
4917 4918 4919
	145, 149, 153, 157, 161, 165
};

4920
static void iwl3945_init_band_reference(const struct iwl3945_priv *priv, int band,
4921
				    int *eeprom_ch_count,
4922
				    const struct iwl3945_eeprom_channel
4923 4924 4925 4926 4927
				    **eeprom_ch_info,
				    const u8 **eeprom_ch_index)
{
	switch (band) {
	case 1:		/* 2.4GHz band */
4928
		*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
4929
		*eeprom_ch_info = priv->eeprom.band_1_channels;
4930
		*eeprom_ch_index = iwl3945_eeprom_band_1;
4931 4932
		break;
	case 2:		/* 5.2GHz band */
4933
		*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
4934
		*eeprom_ch_info = priv->eeprom.band_2_channels;
4935
		*eeprom_ch_index = iwl3945_eeprom_band_2;
4936 4937
		break;
	case 3:		/* 5.2GHz band */
4938
		*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
4939
		*eeprom_ch_info = priv->eeprom.band_3_channels;
4940
		*eeprom_ch_index = iwl3945_eeprom_band_3;
4941 4942
		break;
	case 4:		/* 5.2GHz band */
4943
		*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
4944
		*eeprom_ch_info = priv->eeprom.band_4_channels;
4945
		*eeprom_ch_index = iwl3945_eeprom_band_4;
4946 4947
		break;
	case 5:		/* 5.2GHz band */
4948
		*eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
4949
		*eeprom_ch_info = priv->eeprom.band_5_channels;
4950
		*eeprom_ch_index = iwl3945_eeprom_band_5;
4951 4952 4953 4954 4955 4956 4957
		break;
	default:
		BUG();
		return;
	}
}

4958
const struct iwl3945_channel_info *iwl3945_get_channel_info(const struct iwl3945_priv *priv,
4959 4960 4961 4962 4963 4964 4965 4966 4967 4968 4969 4970 4971 4972 4973 4974 4975 4976 4977 4978 4979 4980 4981 4982 4983 4984
						    int phymode, u16 channel)
{
	int i;

	switch (phymode) {
	case MODE_IEEE80211A:
		for (i = 14; i < priv->channel_count; i++) {
			if (priv->channel_info[i].channel == channel)
				return &priv->channel_info[i];
		}
		break;

	case MODE_IEEE80211B:
	case MODE_IEEE80211G:
		if (channel >= 1 && channel <= 14)
			return &priv->channel_info[channel - 1];
		break;

	}

	return NULL;
}

#define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
			    ? # x " " : "")

4985
static int iwl3945_init_channel_map(struct iwl3945_priv *priv)
4986 4987 4988
{
	int eeprom_ch_count = 0;
	const u8 *eeprom_ch_index = NULL;
4989
	const struct iwl3945_eeprom_channel *eeprom_ch_info = NULL;
4990
	int band, ch;
4991
	struct iwl3945_channel_info *ch_info;
4992 4993 4994 4995 4996 4997 4998 4999 5000 5001 5002 5003 5004 5005 5006

	if (priv->channel_count) {
		IWL_DEBUG_INFO("Channel map already initialized.\n");
		return 0;
	}

	if (priv->eeprom.version < 0x2f) {
		IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
			    priv->eeprom.version);
		return -EINVAL;
	}

	IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");

	priv->channel_count =
5007 5008 5009 5010 5011
	    ARRAY_SIZE(iwl3945_eeprom_band_1) +
	    ARRAY_SIZE(iwl3945_eeprom_band_2) +
	    ARRAY_SIZE(iwl3945_eeprom_band_3) +
	    ARRAY_SIZE(iwl3945_eeprom_band_4) +
	    ARRAY_SIZE(iwl3945_eeprom_band_5);
5012 5013 5014

	IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);

5015
	priv->channel_info = kzalloc(sizeof(struct iwl3945_channel_info) *
5016 5017 5018 5019 5020 5021 5022 5023 5024 5025 5026 5027 5028 5029
				     priv->channel_count, GFP_KERNEL);
	if (!priv->channel_info) {
		IWL_ERROR("Could not allocate channel_info\n");
		priv->channel_count = 0;
		return -ENOMEM;
	}

	ch_info = priv->channel_info;

	/* Loop through the 5 EEPROM bands adding them in order to the
	 * channel map we maintain (that contains additional information than
	 * what just in the EEPROM) */
	for (band = 1; band <= 5; band++) {

5030
		iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
5031 5032 5033 5034 5035 5036 5037 5038 5039 5040 5041 5042 5043 5044 5045 5046 5047 5048 5049 5050 5051 5052 5053 5054 5055 5056 5057 5058 5059 5060 5061 5062 5063 5064 5065 5066 5067 5068 5069 5070 5071 5072 5073 5074 5075 5076 5077 5078 5079 5080 5081 5082 5083 5084 5085 5086 5087 5088 5089 5090 5091 5092 5093 5094 5095 5096 5097 5098 5099 5100 5101 5102 5103 5104 5105 5106 5107 5108 5109 5110 5111 5112 5113 5114 5115 5116 5117 5118 5119 5120 5121 5122
					&eeprom_ch_info, &eeprom_ch_index);

		/* Loop through each band adding each of the channels */
		for (ch = 0; ch < eeprom_ch_count; ch++) {
			ch_info->channel = eeprom_ch_index[ch];
			ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
			    MODE_IEEE80211A;

			/* permanently store EEPROM's channel regulatory flags
			 *   and max power in channel info database. */
			ch_info->eeprom = eeprom_ch_info[ch];

			/* Copy the run-time flags so they are there even on
			 * invalid channels */
			ch_info->flags = eeprom_ch_info[ch].flags;

			if (!(is_channel_valid(ch_info))) {
				IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
					       "No traffic\n",
					       ch_info->channel,
					       ch_info->flags,
					       is_channel_a_band(ch_info) ?
					       "5.2" : "2.4");
				ch_info++;
				continue;
			}

			/* Initialize regulatory-based run-time data */
			ch_info->max_power_avg = ch_info->curr_txpow =
			    eeprom_ch_info[ch].max_power_avg;
			ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
			ch_info->min_power = 0;

			IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
				       " %ddBm): Ad-Hoc %ssupported\n",
				       ch_info->channel,
				       is_channel_a_band(ch_info) ?
				       "5.2" : "2.4",
				       CHECK_AND_PRINT(IBSS),
				       CHECK_AND_PRINT(ACTIVE),
				       CHECK_AND_PRINT(RADAR),
				       CHECK_AND_PRINT(WIDE),
				       CHECK_AND_PRINT(NARROW),
				       CHECK_AND_PRINT(DFS),
				       eeprom_ch_info[ch].flags,
				       eeprom_ch_info[ch].max_power_avg,
				       ((eeprom_ch_info[ch].
					 flags & EEPROM_CHANNEL_IBSS)
					&& !(eeprom_ch_info[ch].
					     flags & EEPROM_CHANNEL_RADAR))
				       ? "" : "not ");

			/* Set the user_txpower_limit to the highest power
			 * supported by any channel */
			if (eeprom_ch_info[ch].max_power_avg >
			    priv->user_txpower_limit)
				priv->user_txpower_limit =
				    eeprom_ch_info[ch].max_power_avg;

			ch_info++;
		}
	}

	if (iwl3945_txpower_set_from_eeprom(priv))
		return -EIO;

	return 0;
}

/* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
 * sending probe req.  This should be set long enough to hear probe responses
 * from more than one AP.  */
#define IWL_ACTIVE_DWELL_TIME_24    (20)	/* all times in msec */
#define IWL_ACTIVE_DWELL_TIME_52    (10)

/* For faster active scanning, scan will move to the next channel if fewer than
 * PLCP_QUIET_THRESH packets are heard on this channel within
 * ACTIVE_QUIET_TIME after sending probe request.  This shortens the dwell
 * time if it's a quiet channel (nothing responded to our probe, and there's
 * no other traffic).
 * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
#define IWL_PLCP_QUIET_THRESH       __constant_cpu_to_le16(1)	/* packets */
#define IWL_ACTIVE_QUIET_TIME       __constant_cpu_to_le16(5)	/* msec */

/* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
 * Must be set longer than active dwell time.
 * For the most reliable scan, set > AP beacon interval (typically 100msec). */
#define IWL_PASSIVE_DWELL_TIME_24   (20)	/* all times in msec */
#define IWL_PASSIVE_DWELL_TIME_52   (10)
#define IWL_PASSIVE_DWELL_BASE      (100)
#define IWL_CHANNEL_TUNE_TIME       5

5123
static inline u16 iwl3945_get_active_dwell_time(struct iwl3945_priv *priv, int phymode)
5124 5125 5126 5127 5128 5129 5130
{
	if (phymode == MODE_IEEE80211A)
		return IWL_ACTIVE_DWELL_TIME_52;
	else
		return IWL_ACTIVE_DWELL_TIME_24;
}

5131
static u16 iwl3945_get_passive_dwell_time(struct iwl3945_priv *priv, int phymode)
5132
{
5133
	u16 active = iwl3945_get_active_dwell_time(priv, phymode);
5134 5135 5136 5137
	u16 passive = (phymode != MODE_IEEE80211A) ?
	    IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
	    IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;

5138
	if (iwl3945_is_associated(priv)) {
5139 5140 5141 5142 5143 5144 5145 5146 5147 5148 5149 5150 5151 5152 5153
		/* If we're associated, we clamp the maximum passive
		 * dwell time to be 98% of the beacon interval (minus
		 * 2 * channel tune time) */
		passive = priv->beacon_int;
		if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
			passive = IWL_PASSIVE_DWELL_BASE;
		passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
	}

	if (passive <= active)
		passive = active + 1;

	return passive;
}

5154
static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, int phymode,
5155
				     u8 is_active, u8 direct_mask,
5156
				     struct iwl3945_scan_channel *scan_ch)
5157 5158 5159
{
	const struct ieee80211_channel *channels = NULL;
	const struct ieee80211_hw_mode *hw_mode;
5160
	const struct iwl3945_channel_info *ch_info;
5161 5162 5163 5164
	u16 passive_dwell = 0;
	u16 active_dwell = 0;
	int added, i;

5165
	hw_mode = iwl3945_get_hw_mode(priv, phymode);
5166 5167 5168 5169 5170
	if (!hw_mode)
		return 0;

	channels = hw_mode->channels;

5171 5172
	active_dwell = iwl3945_get_active_dwell_time(priv, phymode);
	passive_dwell = iwl3945_get_passive_dwell_time(priv, phymode);
5173 5174 5175 5176

	for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
		if (channels[i].chan ==
		    le16_to_cpu(priv->active_rxon.channel)) {
5177
			if (iwl3945_is_associated(priv)) {
5178 5179 5180 5181 5182 5183 5184 5185 5186 5187
				IWL_DEBUG_SCAN
				    ("Skipping current channel %d\n",
				     le16_to_cpu(priv->active_rxon.channel));
				continue;
			}
		} else if (priv->only_active_channel)
			continue;

		scan_ch->channel = channels[i].chan;

5188
		ch_info = iwl3945_get_channel_info(priv, phymode, scan_ch->channel);
5189 5190 5191 5192 5193 5194 5195 5196 5197 5198 5199 5200 5201 5202 5203 5204 5205 5206 5207 5208 5209 5210 5211 5212 5213 5214 5215 5216 5217 5218 5219 5220 5221 5222 5223 5224 5225 5226 5227 5228 5229 5230 5231 5232 5233 5234 5235 5236 5237 5238
		if (!is_channel_valid(ch_info)) {
			IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
				       scan_ch->channel);
			continue;
		}

		if (!is_active || is_channel_passive(ch_info) ||
		    !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
			scan_ch->type = 0;	/* passive */
		else
			scan_ch->type = 1;	/* active */

		if (scan_ch->type & 1)
			scan_ch->type |= (direct_mask << 1);

		if (is_channel_narrow(ch_info))
			scan_ch->type |= (1 << 7);

		scan_ch->active_dwell = cpu_to_le16(active_dwell);
		scan_ch->passive_dwell = cpu_to_le16(passive_dwell);

		/* Set power levels to defaults */
		scan_ch->tpc.dsp_atten = 110;
		/* scan_pwr_info->tpc.dsp_atten; */

		/*scan_pwr_info->tpc.tx_gain; */
		if (phymode == MODE_IEEE80211A)
			scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
		else {
			scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
			/* NOTE: if we were doing 6Mb OFDM for scans we'd use
			 * power level
			 scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
			 */
		}

		IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
			       scan_ch->channel,
			       (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
			       (scan_ch->type & 1) ?
			       active_dwell : passive_dwell);

		scan_ch++;
		added++;
	}

	IWL_DEBUG_SCAN("total channels to scan %d \n", added);
	return added;
}

5239
static void iwl3945_reset_channel_flag(struct iwl3945_priv *priv)
5240 5241 5242 5243 5244 5245 5246 5247 5248
{
	int i, j;
	for (i = 0; i < 3; i++) {
		struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
		for (j = 0; j < hw_mode->num_channels; j++)
			hw_mode->channels[j].flag = hw_mode->channels[j].val;
	}
}

5249
static void iwl3945_init_hw_rates(struct iwl3945_priv *priv,
5250 5251 5252 5253 5254
			      struct ieee80211_rate *rates)
{
	int i;

	for (i = 0; i < IWL_RATE_COUNT; i++) {
5255
		rates[i].rate = iwl3945_rates[i].ieee * 5;
5256 5257 5258 5259 5260 5261 5262 5263 5264 5265 5266
		rates[i].val = i; /* Rate scaling will work on indexes */
		rates[i].val2 = i;
		rates[i].flags = IEEE80211_RATE_SUPPORTED;
		/* Only OFDM have the bits-per-symbol set */
		if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
			rates[i].flags |= IEEE80211_RATE_OFDM;
		else {
			/*
			 * If CCK 1M then set rate flag to CCK else CCK_2
			 * which is CCK | PREAMBLE2
			 */
5267
			rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
5268 5269 5270 5271 5272 5273 5274 5275 5276 5277
				IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
		}

		/* Set up which ones are basic rates... */
		if (IWL_BASIC_RATES_MASK & (1 << i))
			rates[i].flags |= IEEE80211_RATE_BASIC;
	}
}

/**
5278
 * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
5279
 */
5280
static int iwl3945_init_geos(struct iwl3945_priv *priv)
5281
{
5282
	struct iwl3945_channel_info *ch;
5283 5284 5285 5286 5287 5288 5289 5290 5291 5292 5293 5294 5295 5296 5297 5298 5299 5300 5301 5302 5303 5304 5305 5306 5307 5308 5309 5310 5311 5312 5313 5314 5315 5316 5317 5318 5319 5320 5321 5322 5323 5324 5325 5326 5327
	struct ieee80211_hw_mode *modes;
	struct ieee80211_channel *channels;
	struct ieee80211_channel *geo_ch;
	struct ieee80211_rate *rates;
	int i = 0;
	enum {
		A = 0,
		B = 1,
		G = 2,
	};
	int mode_count = 3;

	if (priv->modes) {
		IWL_DEBUG_INFO("Geography modes already initialized.\n");
		set_bit(STATUS_GEO_CONFIGURED, &priv->status);
		return 0;
	}

	modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
			GFP_KERNEL);
	if (!modes)
		return -ENOMEM;

	channels = kzalloc(sizeof(struct ieee80211_channel) *
			   priv->channel_count, GFP_KERNEL);
	if (!channels) {
		kfree(modes);
		return -ENOMEM;
	}

	rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
			GFP_KERNEL);
	if (!rates) {
		kfree(modes);
		kfree(channels);
		return -ENOMEM;
	}

	/* 0 = 802.11a
	 * 1 = 802.11b
	 * 2 = 802.11g
	 */

	/* 5.2GHz channels start after the 2.4GHz channels */
	modes[A].mode = MODE_IEEE80211A;
5328
	modes[A].channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
5329
	modes[A].rates = &rates[4];
5330 5331 5332 5333 5334
	modes[A].num_rates = 8;	/* just OFDM */
	modes[A].num_channels = 0;

	modes[B].mode = MODE_IEEE80211B;
	modes[B].channels = channels;
5335
	modes[B].rates = rates;
5336 5337 5338 5339 5340 5341 5342 5343 5344 5345 5346 5347
	modes[B].num_rates = 4;	/* just CCK */
	modes[B].num_channels = 0;

	modes[G].mode = MODE_IEEE80211G;
	modes[G].channels = channels;
	modes[G].rates = rates;
	modes[G].num_rates = 12;	/* OFDM & CCK */
	modes[G].num_channels = 0;

	priv->ieee_channels = channels;
	priv->ieee_rates = rates;

5348
	iwl3945_init_hw_rates(priv, rates);
5349 5350 5351 5352 5353 5354 5355 5356 5357 5358 5359 5360 5361 5362 5363 5364 5365 5366 5367 5368 5369 5370 5371 5372 5373 5374 5375 5376 5377 5378 5379 5380 5381 5382 5383 5384 5385 5386 5387 5388 5389 5390 5391 5392 5393 5394 5395 5396 5397 5398 5399 5400 5401 5402 5403 5404 5405 5406 5407 5408 5409 5410 5411 5412 5413 5414 5415 5416 5417 5418 5419 5420 5421 5422 5423 5424 5425 5426 5427 5428 5429 5430

	for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
		ch = &priv->channel_info[i];

		if (!is_channel_valid(ch)) {
			IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
				    "skipping.\n",
				    ch->channel, is_channel_a_band(ch) ?
				    "5.2" : "2.4");
			continue;
		}

		if (is_channel_a_band(ch))
			geo_ch = &modes[A].channels[modes[A].num_channels++];
		else {
			geo_ch = &modes[B].channels[modes[B].num_channels++];
			modes[G].num_channels++;
		}

		geo_ch->freq = ieee80211chan2mhz(ch->channel);
		geo_ch->chan = ch->channel;
		geo_ch->power_level = ch->max_power_avg;
		geo_ch->antenna_max = 0xff;

		if (is_channel_valid(ch)) {
			geo_ch->flag = IEEE80211_CHAN_W_SCAN;
			if (ch->flags & EEPROM_CHANNEL_IBSS)
				geo_ch->flag |= IEEE80211_CHAN_W_IBSS;

			if (ch->flags & EEPROM_CHANNEL_ACTIVE)
				geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;

			if (ch->flags & EEPROM_CHANNEL_RADAR)
				geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;

			if (ch->max_power_avg > priv->max_channel_txpower_limit)
				priv->max_channel_txpower_limit =
				    ch->max_power_avg;
		}

		geo_ch->val = geo_ch->flag;
	}

	if ((modes[A].num_channels == 0) && priv->is_abg) {
		printk(KERN_INFO DRV_NAME
		       ": Incorrectly detected BG card as ABG.  Please send "
		       "your PCI ID 0x%04X:0x%04X to maintainer.\n",
		       priv->pci_dev->device, priv->pci_dev->subsystem_device);
		priv->is_abg = 0;
	}

	printk(KERN_INFO DRV_NAME
	       ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
	       modes[G].num_channels, modes[A].num_channels);

	/*
	 * NOTE:  We register these in preference of order -- the
	 * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
	 * a phymode based on rates or AP capabilities but seems to
	 * configure it purely on if the channel being configured
	 * is supported by a mode -- and the first match is taken
	 */

	if (modes[G].num_channels)
		ieee80211_register_hwmode(priv->hw, &modes[G]);
	if (modes[B].num_channels)
		ieee80211_register_hwmode(priv->hw, &modes[B]);
	if (modes[A].num_channels)
		ieee80211_register_hwmode(priv->hw, &modes[A]);

	priv->modes = modes;
	set_bit(STATUS_GEO_CONFIGURED, &priv->status);

	return 0;
}

/******************************************************************************
 *
 * uCode download functions
 *
 ******************************************************************************/

5431
static void iwl3945_dealloc_ucode_pci(struct iwl3945_priv *priv)
5432 5433 5434 5435 5436 5437 5438 5439 5440 5441 5442 5443 5444 5445 5446 5447 5448 5449 5450 5451 5452 5453 5454 5455 5456 5457 5458 5459 5460 5461 5462 5463 5464 5465 5466 5467 5468 5469 5470 5471 5472 5473 5474 5475 5476 5477
{
	if (priv->ucode_code.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_code.len,
				    priv->ucode_code.v_addr,
				    priv->ucode_code.p_addr);
		priv->ucode_code.v_addr = NULL;
	}
	if (priv->ucode_data.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_data.len,
				    priv->ucode_data.v_addr,
				    priv->ucode_data.p_addr);
		priv->ucode_data.v_addr = NULL;
	}
	if (priv->ucode_data_backup.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_data_backup.len,
				    priv->ucode_data_backup.v_addr,
				    priv->ucode_data_backup.p_addr);
		priv->ucode_data_backup.v_addr = NULL;
	}
	if (priv->ucode_init.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_init.len,
				    priv->ucode_init.v_addr,
				    priv->ucode_init.p_addr);
		priv->ucode_init.v_addr = NULL;
	}
	if (priv->ucode_init_data.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_init_data.len,
				    priv->ucode_init_data.v_addr,
				    priv->ucode_init_data.p_addr);
		priv->ucode_init_data.v_addr = NULL;
	}
	if (priv->ucode_boot.v_addr != NULL) {
		pci_free_consistent(priv->pci_dev,
				    priv->ucode_boot.len,
				    priv->ucode_boot.v_addr,
				    priv->ucode_boot.p_addr);
		priv->ucode_boot.v_addr = NULL;
	}
}

/**
5478
 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
5479 5480
 *     looking at all data.
 */
5481
static int iwl3945_verify_inst_full(struct iwl3945_priv *priv, __le32 * image, u32 len)
5482 5483 5484 5485 5486 5487 5488 5489
{
	u32 val;
	u32 save_len = len;
	int rc = 0;
	u32 errcnt;

	IWL_DEBUG_INFO("ucode inst image size is %u\n", len);

5490
	rc = iwl3945_grab_nic_access(priv);
5491 5492 5493
	if (rc)
		return rc;

5494
	iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5495 5496 5497 5498 5499 5500

	errcnt = 0;
	for (; len > 0; len -= sizeof(u32), image++) {
		/* read data comes through single port, auto-incr addr */
		/* NOTE: Use the debugless read so we don't flood kernel log
		 * if IWL_DL_IO is set */
5501
		val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5502 5503 5504 5505 5506 5507 5508 5509 5510 5511 5512
		if (val != le32_to_cpu(*image)) {
			IWL_ERROR("uCode INST section is invalid at "
				  "offset 0x%x, is 0x%x, s/b 0x%x\n",
				  save_len - len, val, le32_to_cpu(*image));
			rc = -EIO;
			errcnt++;
			if (errcnt >= 20)
				break;
		}
	}

5513
	iwl3945_release_nic_access(priv);
5514 5515

	if (!errcnt)
5516
		IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
5517 5518 5519 5520 5521 5522

	return rc;
}


/**
5523
 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
5524 5525 5526
 *   using sample data 100 bytes apart.  If these sample points are good,
 *   it's a pretty good bet that everything between them is good, too.
 */
5527
static int iwl3945_verify_inst_sparse(struct iwl3945_priv *priv, __le32 *image, u32 len)
5528 5529 5530 5531 5532 5533 5534 5535
{
	u32 val;
	int rc = 0;
	u32 errcnt = 0;
	u32 i;

	IWL_DEBUG_INFO("ucode inst image size is %u\n", len);

5536
	rc = iwl3945_grab_nic_access(priv);
5537 5538 5539 5540 5541 5542 5543
	if (rc)
		return rc;

	for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
		/* read data comes through single port, auto-incr addr */
		/* NOTE: Use the debugless read so we don't flood kernel log
		 * if IWL_DL_IO is set */
5544
		iwl3945_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5545
			i + RTC_INST_LOWER_BOUND);
5546
		val = _iwl3945_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5547 5548 5549 5550 5551 5552 5553 5554 5555 5556 5557 5558 5559
		if (val != le32_to_cpu(*image)) {
#if 0 /* Enable this if you want to see details */
			IWL_ERROR("uCode INST section is invalid at "
				  "offset 0x%x, is 0x%x, s/b 0x%x\n",
				  i, val, *image);
#endif
			rc = -EIO;
			errcnt++;
			if (errcnt >= 3)
				break;
		}
	}

5560
	iwl3945_release_nic_access(priv);
5561 5562 5563 5564 5565 5566

	return rc;
}


/**
5567
 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
5568 5569
 *    and verify its contents
 */
5570
static int iwl3945_verify_ucode(struct iwl3945_priv *priv)
5571 5572 5573 5574 5575 5576 5577 5578
{
	__le32 *image;
	u32 len;
	int rc = 0;

	/* Try bootstrap */
	image = (__le32 *)priv->ucode_boot.v_addr;
	len = priv->ucode_boot.len;
5579
	rc = iwl3945_verify_inst_sparse(priv, image, len);
5580 5581 5582 5583 5584 5585 5586 5587
	if (rc == 0) {
		IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
		return 0;
	}

	/* Try initialize */
	image = (__le32 *)priv->ucode_init.v_addr;
	len = priv->ucode_init.len;
5588
	rc = iwl3945_verify_inst_sparse(priv, image, len);
5589 5590 5591 5592 5593 5594 5595 5596
	if (rc == 0) {
		IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
		return 0;
	}

	/* Try runtime/protocol */
	image = (__le32 *)priv->ucode_code.v_addr;
	len = priv->ucode_code.len;
5597
	rc = iwl3945_verify_inst_sparse(priv, image, len);
5598 5599 5600 5601 5602 5603 5604 5605 5606 5607 5608
	if (rc == 0) {
		IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
		return 0;
	}

	IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");

	/* Show first several data entries in instruction SRAM.
	 * Selection of bootstrap image is arbitrary. */
	image = (__le32 *)priv->ucode_boot.v_addr;
	len = priv->ucode_boot.len;
5609
	rc = iwl3945_verify_inst_full(priv, image, len);
5610 5611 5612 5613 5614 5615

	return rc;
}


/* check contents of special bootstrap uCode SRAM */
5616
static int iwl3945_verify_bsm(struct iwl3945_priv *priv)
5617 5618 5619 5620 5621 5622 5623 5624 5625
{
	__le32 *image = priv->ucode_boot.v_addr;
	u32 len = priv->ucode_boot.len;
	u32 reg;
	u32 val;

	IWL_DEBUG_INFO("Begin verify bsm\n");

	/* verify BSM SRAM contents */
5626
	val = iwl3945_read_prph(priv, BSM_WR_DWCOUNT_REG);
5627 5628 5629
	for (reg = BSM_SRAM_LOWER_BOUND;
	     reg < BSM_SRAM_LOWER_BOUND + len;
	     reg += sizeof(u32), image ++) {
5630
		val = iwl3945_read_prph(priv, reg);
5631 5632 5633 5634 5635 5636 5637 5638 5639 5640 5641 5642 5643 5644 5645 5646
		if (val != le32_to_cpu(*image)) {
			IWL_ERROR("BSM uCode verification failed at "
				  "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
				  BSM_SRAM_LOWER_BOUND,
				  reg - BSM_SRAM_LOWER_BOUND, len,
				  val, le32_to_cpu(*image));
			return -EIO;
		}
	}

	IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");

	return 0;
}

/**
5647
 * iwl3945_load_bsm - Load bootstrap instructions
5648 5649 5650 5651 5652 5653 5654 5655 5656 5657 5658 5659 5660 5661 5662 5663 5664 5665 5666 5667 5668 5669 5670 5671 5672 5673 5674 5675 5676 5677
 *
 * BSM operation:
 *
 * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 * in special SRAM that does not power down during RFKILL.  When powering back
 * up after power-saving sleeps (or during initial uCode load), the BSM loads
 * the bootstrap program into the on-board processor, and starts it.
 *
 * The bootstrap program loads (via DMA) instructions and data for a new
 * program from host DRAM locations indicated by the host driver in the
 * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 * automatically.
 *
 * When initializing the NIC, the host driver points the BSM to the
 * "initialize" uCode image.  This uCode sets up some internal data, then
 * notifies host via "initialize alive" that it is complete.
 *
 * The host then replaces the BSM_DRAM_* pointer values to point to the
 * normal runtime uCode instructions and a backup uCode data cache buffer
 * (filled initially with starting data values for the on-board processor),
 * then triggers the "initialize" uCode to load and launch the runtime uCode,
 * which begins normal operation.
 *
 * When doing a power-save shutdown, runtime uCode saves data SRAM into
 * the backup data cache in DRAM before SRAM is powered down.
 *
 * When powering back up, the BSM loads the bootstrap program.  This reloads
 * the runtime uCode instructions and the backup data cache into SRAM,
 * and re-launches the runtime uCode from where it left off.
 */
5678
static int iwl3945_load_bsm(struct iwl3945_priv *priv)
5679 5680 5681 5682 5683 5684 5685 5686 5687 5688 5689 5690 5691 5692 5693 5694 5695 5696 5697 5698
{
	__le32 *image = priv->ucode_boot.v_addr;
	u32 len = priv->ucode_boot.len;
	dma_addr_t pinst;
	dma_addr_t pdata;
	u32 inst_len;
	u32 data_len;
	int rc;
	int i;
	u32 done;
	u32 reg_offset;

	IWL_DEBUG_INFO("Begin load bsm\n");

	/* make sure bootstrap program is no larger than BSM's SRAM size */
	if (len > IWL_MAX_BSM_SIZE)
		return -EINVAL;

	/* Tell bootstrap uCode where to find the "Initialize" uCode
	 *   in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
5699
	 * NOTE:  iwl3945_initialize_alive_start() will replace these values,
5700 5701 5702 5703 5704 5705 5706
	 *        after the "initialize" uCode has run, to point to
	 *        runtime/protocol instructions and backup data cache. */
	pinst = priv->ucode_init.p_addr;
	pdata = priv->ucode_init_data.p_addr;
	inst_len = priv->ucode_init.len;
	data_len = priv->ucode_init_data.len;

5707
	rc = iwl3945_grab_nic_access(priv);
5708 5709 5710
	if (rc)
		return rc;

5711 5712 5713 5714
	iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
	iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
	iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
	iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5715 5716 5717 5718 5719

	/* Fill BSM memory with bootstrap instructions */
	for (reg_offset = BSM_SRAM_LOWER_BOUND;
	     reg_offset < BSM_SRAM_LOWER_BOUND + len;
	     reg_offset += sizeof(u32), image++)
5720
		_iwl3945_write_prph(priv, reg_offset,
5721 5722
					  le32_to_cpu(*image));

5723
	rc = iwl3945_verify_bsm(priv);
5724
	if (rc) {
5725
		iwl3945_release_nic_access(priv);
5726 5727 5728 5729
		return rc;
	}

	/* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5730 5731
	iwl3945_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
	iwl3945_write_prph(priv, BSM_WR_MEM_DST_REG,
5732
				 RTC_INST_LOWER_BOUND);
5733
	iwl3945_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5734 5735 5736

	/* Load bootstrap code into instruction SRAM now,
	 *   to prepare to load "initialize" uCode */
5737
	iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5738 5739 5740 5741
		BSM_WR_CTRL_REG_BIT_START);

	/* Wait for load of bootstrap uCode to finish */
	for (i = 0; i < 100; i++) {
5742
		done = iwl3945_read_prph(priv, BSM_WR_CTRL_REG);
5743 5744 5745 5746 5747 5748 5749 5750 5751 5752 5753 5754 5755
		if (!(done & BSM_WR_CTRL_REG_BIT_START))
			break;
		udelay(10);
	}
	if (i < 100)
		IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
	else {
		IWL_ERROR("BSM write did not complete!\n");
		return -EIO;
	}

	/* Enable future boot loads whenever power management unit triggers it
	 *   (e.g. when powering back up after power-save shutdown) */
5756
	iwl3945_write_prph(priv, BSM_WR_CTRL_REG,
5757 5758
		BSM_WR_CTRL_REG_BIT_START_EN);

5759
	iwl3945_release_nic_access(priv);
5760 5761 5762 5763

	return 0;
}

5764
static void iwl3945_nic_start(struct iwl3945_priv *priv)
5765 5766
{
	/* Remove all resets to allow NIC to operate */
5767
	iwl3945_write32(priv, CSR_RESET, 0);
5768 5769 5770
}

/**
5771
 * iwl3945_read_ucode - Read uCode images from disk file.
5772 5773 5774
 *
 * Copy into buffers for card to fetch via bus-mastering
 */
5775
static int iwl3945_read_ucode(struct iwl3945_priv *priv)
5776
{
5777
	struct iwl3945_ucode *ucode;
5778 5779 5780 5781 5782 5783 5784 5785 5786 5787 5788 5789 5790 5791 5792 5793 5794 5795 5796 5797 5798 5799 5800 5801 5802 5803 5804 5805 5806 5807 5808 5809 5810 5811 5812 5813 5814
	int rc = 0;
	const struct firmware *ucode_raw;
	/* firmware file name contains uCode/driver compatibility version */
	const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
	u8 *src;
	size_t len;
	u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;

	/* Ask kernel firmware_class module to get the boot firmware off disk.
	 * request_firmware() is synchronous, file is in memory on return. */
	rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
	if (rc < 0) {
		IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
		goto error;
	}

	IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
		       name, ucode_raw->size);

	/* Make sure that we got at least our header! */
	if (ucode_raw->size < sizeof(*ucode)) {
		IWL_ERROR("File size way too small!\n");
		rc = -EINVAL;
		goto err_release;
	}

	/* Data from ucode file:  header followed by uCode images */
	ucode = (void *)ucode_raw->data;

	ver = le32_to_cpu(ucode->ver);
	inst_size = le32_to_cpu(ucode->inst_size);
	data_size = le32_to_cpu(ucode->data_size);
	init_size = le32_to_cpu(ucode->init_size);
	init_data_size = le32_to_cpu(ucode->init_data_size);
	boot_size = le32_to_cpu(ucode->boot_size);

	IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
5815 5816 5817 5818 5819
	IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
	IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
	IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
	IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
	IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
5820 5821 5822 5823 5824 5825 5826 5827 5828 5829 5830 5831 5832 5833 5834 5835 5836 5837 5838 5839 5840 5841 5842 5843 5844 5845 5846 5847 5848 5849 5850 5851 5852 5853 5854 5855 5856 5857 5858 5859 5860 5861 5862 5863 5864 5865 5866 5867 5868 5869 5870 5871 5872 5873 5874 5875 5876 5877 5878 5879 5880 5881 5882 5883 5884 5885 5886 5887 5888 5889 5890 5891 5892 5893 5894 5895 5896 5897 5898 5899 5900 5901 5902 5903 5904 5905 5906 5907 5908 5909 5910 5911 5912 5913 5914 5915 5916 5917 5918 5919 5920 5921 5922 5923 5924 5925 5926 5927 5928

	/* Verify size of file vs. image size info in file's header */
	if (ucode_raw->size < sizeof(*ucode) +
		inst_size + data_size + init_size +
		init_data_size + boot_size) {

		IWL_DEBUG_INFO("uCode file size %d too small\n",
			       (int)ucode_raw->size);
		rc = -EINVAL;
		goto err_release;
	}

	/* Verify that uCode images will fit in card's SRAM */
	if (inst_size > IWL_MAX_INST_SIZE) {
		IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
			       (int)inst_size);
		rc = -EINVAL;
		goto err_release;
	}

	if (data_size > IWL_MAX_DATA_SIZE) {
		IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
			       (int)data_size);
		rc = -EINVAL;
		goto err_release;
	}
	if (init_size > IWL_MAX_INST_SIZE) {
		IWL_DEBUG_INFO
		    ("uCode init instr len %d too large to fit in card\n",
		     (int)init_size);
		rc = -EINVAL;
		goto err_release;
	}
	if (init_data_size > IWL_MAX_DATA_SIZE) {
		IWL_DEBUG_INFO
		    ("uCode init data len %d too large to fit in card\n",
		     (int)init_data_size);
		rc = -EINVAL;
		goto err_release;
	}
	if (boot_size > IWL_MAX_BSM_SIZE) {
		IWL_DEBUG_INFO
		    ("uCode boot instr len %d too large to fit in bsm\n",
		     (int)boot_size);
		rc = -EINVAL;
		goto err_release;
	}

	/* Allocate ucode buffers for card's bus-master loading ... */

	/* Runtime instructions and 2 copies of data:
	 * 1) unmodified from disk
	 * 2) backup cache for save/restore during power-downs */
	priv->ucode_code.len = inst_size;
	priv->ucode_code.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_code.len,
				 &(priv->ucode_code.p_addr));

	priv->ucode_data.len = data_size;
	priv->ucode_data.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_data.len,
				 &(priv->ucode_data.p_addr));

	priv->ucode_data_backup.len = data_size;
	priv->ucode_data_backup.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_data_backup.len,
				 &(priv->ucode_data_backup.p_addr));


	/* Initialization instructions and data */
	priv->ucode_init.len = init_size;
	priv->ucode_init.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_init.len,
				 &(priv->ucode_init.p_addr));

	priv->ucode_init_data.len = init_data_size;
	priv->ucode_init_data.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_init_data.len,
				 &(priv->ucode_init_data.p_addr));

	/* Bootstrap (instructions only, no data) */
	priv->ucode_boot.len = boot_size;
	priv->ucode_boot.v_addr =
	    pci_alloc_consistent(priv->pci_dev,
				 priv->ucode_boot.len,
				 &(priv->ucode_boot.p_addr));

	if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
	    !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
	    !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
		goto err_pci_alloc;

	/* Copy images into buffers for card's bus-master reads ... */

	/* Runtime instructions (first block of data in file) */
	src = &ucode->data[0];
	len = priv->ucode_code.len;
	IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
		       (int)len);
	memcpy(priv->ucode_code.v_addr, src, len);
	IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
		priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);

	/* Runtime data (2nd block)
5929
	 * NOTE:  Copy into backup buffer will be done in iwl3945_up()  */
5930 5931 5932 5933 5934 5935 5936 5937 5938 5939 5940 5941 5942 5943 5944 5945 5946 5947 5948 5949 5950 5951 5952 5953 5954 5955 5956 5957 5958 5959 5960 5961 5962 5963 5964 5965 5966 5967 5968
	src = &ucode->data[inst_size];
	len = priv->ucode_data.len;
	IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
		       (int)len);
	memcpy(priv->ucode_data.v_addr, src, len);
	memcpy(priv->ucode_data_backup.v_addr, src, len);

	/* Initialization instructions (3rd block) */
	if (init_size) {
		src = &ucode->data[inst_size + data_size];
		len = priv->ucode_init.len;
		IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
			       (int)len);
		memcpy(priv->ucode_init.v_addr, src, len);
	}

	/* Initialization data (4th block) */
	if (init_data_size) {
		src = &ucode->data[inst_size + data_size + init_size];
		len = priv->ucode_init_data.len;
		IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
			       (int)len);
		memcpy(priv->ucode_init_data.v_addr, src, len);
	}

	/* Bootstrap instructions (5th block) */
	src = &ucode->data[inst_size + data_size + init_size + init_data_size];
	len = priv->ucode_boot.len;
	IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
		       (int)len);
	memcpy(priv->ucode_boot.v_addr, src, len);

	/* We have our copies now, allow OS release its copies */
	release_firmware(ucode_raw);
	return 0;

 err_pci_alloc:
	IWL_ERROR("failed to allocate pci memory\n");
	rc = -ENOMEM;
5969
	iwl3945_dealloc_ucode_pci(priv);
5970 5971 5972 5973 5974 5975 5976 5977 5978 5979

 err_release:
	release_firmware(ucode_raw);

 error:
	return rc;
}


/**
5980
 * iwl3945_set_ucode_ptrs - Set uCode address location
5981 5982 5983 5984 5985 5986 5987
 *
 * Tell initialization uCode where to find runtime uCode.
 *
 * BSM registers initially contain pointers to initialization uCode.
 * We need to replace them to load runtime uCode inst and data,
 * and to save runtime data when powering down.
 */
5988
static int iwl3945_set_ucode_ptrs(struct iwl3945_priv *priv)
5989 5990 5991 5992 5993 5994 5995 5996 5997 5998 5999
{
	dma_addr_t pinst;
	dma_addr_t pdata;
	int rc = 0;
	unsigned long flags;

	/* bits 31:0 for 3945 */
	pinst = priv->ucode_code.p_addr;
	pdata = priv->ucode_data_backup.p_addr;

	spin_lock_irqsave(&priv->lock, flags);
6000
	rc = iwl3945_grab_nic_access(priv);
6001 6002 6003 6004 6005 6006
	if (rc) {
		spin_unlock_irqrestore(&priv->lock, flags);
		return rc;
	}

	/* Tell bootstrap uCode where to find image to load */
6007 6008 6009
	iwl3945_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
	iwl3945_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
	iwl3945_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
6010 6011 6012 6013
				 priv->ucode_data.len);

	/* Inst bytecount must be last to set up, bit 31 signals uCode
	 *   that all new ptr/size info is in place */
6014
	iwl3945_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
6015 6016
				 priv->ucode_code.len | BSM_DRAM_INST_LOAD);

6017
	iwl3945_release_nic_access(priv);
6018 6019 6020 6021 6022 6023 6024 6025 6026

	spin_unlock_irqrestore(&priv->lock, flags);

	IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");

	return rc;
}

/**
6027
 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
6028 6029 6030 6031 6032 6033 6034 6035 6036
 *
 * Called after REPLY_ALIVE notification received from "initialize" uCode.
 *
 * The 4965 "initialize" ALIVE reply contains calibration data for:
 *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 *   (3945 does not contain this data).
 *
 * Tell "initialize" uCode to go ahead and load the runtime uCode.
*/
6037
static void iwl3945_init_alive_start(struct iwl3945_priv *priv)
6038 6039 6040 6041 6042 6043 6044 6045 6046 6047 6048 6049
{
	/* Check alive response for "valid" sign from uCode */
	if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
		/* We had an error bringing up the hardware, so take it
		 * all the way back down so we can try again */
		IWL_DEBUG_INFO("Initialize Alive failed.\n");
		goto restart;
	}

	/* Bootstrap uCode has loaded initialize uCode ... verify inst image.
	 * This is a paranoid check, because we would not have gotten the
	 * "initialize" alive if code weren't properly loaded.  */
6050
	if (iwl3945_verify_ucode(priv)) {
6051 6052 6053 6054 6055 6056 6057 6058 6059 6060
		/* Runtime instruction load was bad;
		 * take it all the way back down so we can try again */
		IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
		goto restart;
	}

	/* Send pointers to protocol/runtime uCode image ... init code will
	 * load and launch runtime uCode, which will send us another "Alive"
	 * notification. */
	IWL_DEBUG_INFO("Initialization Alive received.\n");
6061
	if (iwl3945_set_ucode_ptrs(priv)) {
6062 6063 6064 6065 6066 6067 6068 6069 6070 6071 6072 6073 6074
		/* Runtime instruction load won't happen;
		 * take it all the way back down so we can try again */
		IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
		goto restart;
	}
	return;

 restart:
	queue_work(priv->workqueue, &priv->restart);
}


/**
6075
 * iwl3945_alive_start - called after REPLY_ALIVE notification received
6076
 *                   from protocol/runtime uCode (initialization uCode's
6077
 *                   Alive gets handled by iwl3945_init_alive_start()).
6078
 */
6079
static void iwl3945_alive_start(struct iwl3945_priv *priv)
6080 6081 6082 6083 6084 6085 6086 6087 6088 6089 6090 6091 6092 6093 6094 6095 6096
{
	int rc = 0;
	int thermal_spin = 0;
	u32 rfkill;

	IWL_DEBUG_INFO("Runtime Alive received.\n");

	if (priv->card_alive.is_valid != UCODE_VALID_OK) {
		/* We had an error bringing up the hardware, so take it
		 * all the way back down so we can try again */
		IWL_DEBUG_INFO("Alive failed.\n");
		goto restart;
	}

	/* Initialize uCode has loaded Runtime uCode ... verify inst image.
	 * This is a paranoid check, because we would not have gotten the
	 * "runtime" alive if code weren't properly loaded.  */
6097
	if (iwl3945_verify_ucode(priv)) {
6098 6099 6100 6101 6102 6103
		/* Runtime instruction load was bad;
		 * take it all the way back down so we can try again */
		IWL_DEBUG_INFO("Bad runtime uCode load.\n");
		goto restart;
	}

6104
	iwl3945_clear_stations_table(priv);
6105

6106
	rc = iwl3945_grab_nic_access(priv);
6107 6108 6109 6110 6111
	if (rc) {
		IWL_WARNING("Can not read rfkill status from adapter\n");
		return;
	}

6112
	rfkill = iwl3945_read_prph(priv, APMG_RFKILL_REG);
6113
	IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
6114
	iwl3945_release_nic_access(priv);
6115 6116 6117 6118 6119

	if (rfkill & 0x1) {
		clear_bit(STATUS_RF_KILL_HW, &priv->status);
		/* if rfkill is not on, then wait for thermal
		 * sensor in adapter to kick in */
6120
		while (iwl3945_hw_get_temperature(priv) == 0) {
6121 6122 6123 6124 6125 6126 6127 6128 6129 6130 6131 6132 6133 6134 6135 6136
			thermal_spin++;
			udelay(10);
		}

		if (thermal_spin)
			IWL_DEBUG_INFO("Thermal calibration took %dus\n",
				       thermal_spin * 10);
	} else
		set_bit(STATUS_RF_KILL_HW, &priv->status);

	/* After the ALIVE response, we can process host commands */
	set_bit(STATUS_ALIVE, &priv->status);

	/* Clear out the uCode error bit if it is set */
	clear_bit(STATUS_FW_ERROR, &priv->status);

6137
	rc = iwl3945_init_channel_map(priv);
6138 6139 6140 6141 6142
	if (rc) {
		IWL_ERROR("initializing regulatory failed: %d\n", rc);
		return;
	}

6143
	iwl3945_init_geos(priv);
6144

6145
	if (iwl3945_is_rfkill(priv))
6146 6147 6148 6149 6150 6151
		return;

	if (!priv->mac80211_registered) {
		/* Unlock so any user space entry points can call back into
		 * the driver without a deadlock... */
		mutex_unlock(&priv->mutex);
6152
		iwl3945_rate_control_register(priv->hw);
6153 6154 6155 6156 6157
		rc = ieee80211_register_hw(priv->hw);
		priv->hw->conf.beacon_int = 100;
		mutex_lock(&priv->mutex);

		if (rc) {
6158
			iwl3945_rate_control_unregister(priv->hw);
6159 6160 6161 6162 6163 6164 6165
			IWL_ERROR("Failed to register network "
				  "device (error %d)\n", rc);
			return;
		}

		priv->mac80211_registered = 1;

6166
		iwl3945_reset_channel_flag(priv);
6167 6168 6169 6170 6171 6172
	} else
		ieee80211_start_queues(priv->hw);

	priv->active_rate = priv->rates_mask;
	priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;

6173
	iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
6174

6175 6176 6177
	if (iwl3945_is_associated(priv)) {
		struct iwl3945_rxon_cmd *active_rxon =
				(struct iwl3945_rxon_cmd *)(&priv->active_rxon);
6178 6179 6180 6181 6182 6183

		memcpy(&priv->staging_rxon, &priv->active_rxon,
		       sizeof(priv->staging_rxon));
		active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
	} else {
		/* Initialize our rx_config data */
6184
		iwl3945_connection_init_rx_config(priv);
6185 6186 6187 6188
		memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
	}

	/* Configure BT coexistence */
6189
	iwl3945_send_bt_config(priv);
6190 6191

	/* Configure the adapter for unassociated operation */
6192
	iwl3945_commit_rxon(priv);
6193 6194 6195 6196 6197 6198 6199 6200 6201 6202

	/* At this point, the NIC is initialized and operational */
	priv->notif_missed_beacons = 0;
	set_bit(STATUS_READY, &priv->status);

	iwl3945_reg_txpower_periodic(priv);

	IWL_DEBUG_INFO("ALIVE processing complete.\n");

	if (priv->error_recovering)
6203
		iwl3945_error_recovery(priv);
6204 6205 6206 6207 6208 6209 6210

	return;

 restart:
	queue_work(priv->workqueue, &priv->restart);
}

6211
static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv);
6212

6213
static void __iwl3945_down(struct iwl3945_priv *priv)
6214 6215 6216 6217 6218 6219 6220 6221 6222 6223 6224 6225
{
	unsigned long flags;
	int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
	struct ieee80211_conf *conf = NULL;

	IWL_DEBUG_INFO(DRV_NAME " is going down\n");

	conf = ieee80211_get_hw_conf(priv->hw);

	if (!exit_pending)
		set_bit(STATUS_EXIT_PENDING, &priv->status);

6226
	iwl3945_clear_stations_table(priv);
6227 6228 6229 6230 6231 6232 6233 6234 6235 6236

	/* Unblock any waiting calls */
	wake_up_interruptible_all(&priv->wait_command_queue);

	/* Wipe out the EXIT_PENDING status bit if we are not actually
	 * exiting the module */
	if (!exit_pending)
		clear_bit(STATUS_EXIT_PENDING, &priv->status);

	/* stop and reset the on-board processor */
6237
	iwl3945_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6238 6239

	/* tell the device to stop sending interrupts */
6240
	iwl3945_disable_interrupts(priv);
6241 6242 6243 6244

	if (priv->mac80211_registered)
		ieee80211_stop_queues(priv->hw);

6245
	/* If we have not previously called iwl3945_init() then
6246
	 * clear all bits but the RF Kill and SUSPEND bits and return */
6247
	if (!iwl3945_is_init(priv)) {
6248 6249 6250 6251 6252 6253 6254 6255 6256 6257 6258 6259 6260 6261 6262 6263 6264 6265 6266 6267 6268
		priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
					STATUS_RF_KILL_HW |
			       test_bit(STATUS_RF_KILL_SW, &priv->status) <<
					STATUS_RF_KILL_SW |
			       test_bit(STATUS_IN_SUSPEND, &priv->status) <<
					STATUS_IN_SUSPEND;
		goto exit;
	}

	/* ...otherwise clear out all the status bits but the RF Kill and
	 * SUSPEND bits and continue taking the NIC down. */
	priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
				STATUS_RF_KILL_HW |
			test_bit(STATUS_RF_KILL_SW, &priv->status) <<
				STATUS_RF_KILL_SW |
			test_bit(STATUS_IN_SUSPEND, &priv->status) <<
				STATUS_IN_SUSPEND |
			test_bit(STATUS_FW_ERROR, &priv->status) <<
				STATUS_FW_ERROR;

	spin_lock_irqsave(&priv->lock, flags);
6269
	iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
6270 6271
	spin_unlock_irqrestore(&priv->lock, flags);

6272 6273
	iwl3945_hw_txq_ctx_stop(priv);
	iwl3945_hw_rxq_stop(priv);
6274 6275

	spin_lock_irqsave(&priv->lock, flags);
6276 6277
	if (!iwl3945_grab_nic_access(priv)) {
		iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
6278
					 APMG_CLK_VAL_DMA_CLK_RQT);
6279
		iwl3945_release_nic_access(priv);
6280 6281 6282 6283 6284
	}
	spin_unlock_irqrestore(&priv->lock, flags);

	udelay(5);

6285 6286 6287
	iwl3945_hw_nic_stop_master(priv);
	iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
	iwl3945_hw_nic_reset(priv);
6288 6289

 exit:
6290
	memset(&priv->card_alive, 0, sizeof(struct iwl3945_alive_resp));
6291 6292 6293 6294 6295 6296

	if (priv->ibss_beacon)
		dev_kfree_skb(priv->ibss_beacon);
	priv->ibss_beacon = NULL;

	/* clear out any free frames */
6297
	iwl3945_clear_free_frames(priv);
6298 6299
}

6300
static void iwl3945_down(struct iwl3945_priv *priv)
6301 6302
{
	mutex_lock(&priv->mutex);
6303
	__iwl3945_down(priv);
6304
	mutex_unlock(&priv->mutex);
6305

6306
	iwl3945_cancel_deferred_work(priv);
6307 6308 6309 6310
}

#define MAX_HW_RESTARTS 5

6311
static int __iwl3945_up(struct iwl3945_priv *priv)
6312
{
6313
	DECLARE_MAC_BUF(mac);
6314 6315 6316 6317 6318 6319 6320 6321 6322 6323 6324 6325 6326
	int rc, i;

	if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
		IWL_WARNING("Exit pending; will not bring the NIC up\n");
		return -EIO;
	}

	if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
		IWL_WARNING("Radio disabled by SW RF kill (module "
			    "parameter)\n");
		return 0;
	}

6327 6328 6329 6330 6331
	if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
		IWL_ERROR("ucode not available for device bringup\n");
		return -EIO;
	}

6332
	iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
6333

6334
	rc = iwl3945_hw_nic_init(priv);
6335 6336 6337 6338 6339 6340
	if (rc) {
		IWL_ERROR("Unable to int nic\n");
		return rc;
	}

	/* make sure rfkill handshake bits are cleared */
6341 6342
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
6343 6344 6345
		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);

	/* clear (again), then enable host interrupts */
6346 6347
	iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
	iwl3945_enable_interrupts(priv);
6348 6349

	/* really make sure rfkill handshake bits are cleared */
6350 6351
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
6352 6353 6354 6355 6356 6357 6358 6359 6360

	/* Copy original ucode data image from disk into backup cache.
	 * This will be used to initialize the on-board processor's
	 * data SRAM for a clean start when the runtime program first loads. */
	memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
			priv->ucode_data.len);

	for (i = 0; i < MAX_HW_RESTARTS; i++) {

6361
		iwl3945_clear_stations_table(priv);
6362 6363 6364 6365

		/* load bootstrap state machine,
		 * load bootstrap program into processor's memory,
		 * prepare to load the "initialize" uCode */
6366
		rc = iwl3945_load_bsm(priv);
6367 6368 6369 6370 6371 6372 6373

		if (rc) {
			IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
			continue;
		}

		/* start card; "initialize" will load runtime ucode */
6374
		iwl3945_nic_start(priv);
6375 6376 6377

		/* MAC Address location in EEPROM same for 3945/4965 */
		get_eeprom_mac(priv, priv->mac_addr);
6378 6379
		IWL_DEBUG_INFO("MAC address: %s\n",
			       print_mac(mac, priv->mac_addr));
6380 6381 6382 6383 6384 6385 6386 6387 6388

		SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);

		IWL_DEBUG_INFO(DRV_NAME " is coming up\n");

		return 0;
	}

	set_bit(STATUS_EXIT_PENDING, &priv->status);
6389
	__iwl3945_down(priv);
6390 6391 6392 6393 6394 6395 6396 6397 6398 6399 6400 6401 6402 6403

	/* tried to restart and config the device for as long as our
	 * patience could withstand */
	IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
	return -EIO;
}


/*****************************************************************************
 *
 * Workqueue callbacks
 *
 *****************************************************************************/

6404
static void iwl3945_bg_init_alive_start(struct work_struct *data)
6405
{
6406 6407
	struct iwl3945_priv *priv =
	    container_of(data, struct iwl3945_priv, init_alive_start.work);
6408 6409 6410 6411 6412

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);
6413
	iwl3945_init_alive_start(priv);
6414 6415 6416
	mutex_unlock(&priv->mutex);
}

6417
static void iwl3945_bg_alive_start(struct work_struct *data)
6418
{
6419 6420
	struct iwl3945_priv *priv =
	    container_of(data, struct iwl3945_priv, alive_start.work);
6421 6422 6423 6424 6425

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);
6426
	iwl3945_alive_start(priv);
6427 6428 6429
	mutex_unlock(&priv->mutex);
}

6430
static void iwl3945_bg_rf_kill(struct work_struct *work)
6431
{
6432
	struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, rf_kill);
6433 6434 6435 6436 6437 6438 6439 6440

	wake_up_interruptible(&priv->wait_command_queue);

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);

6441
	if (!iwl3945_is_rfkill(priv)) {
6442 6443 6444 6445 6446 6447 6448 6449 6450 6451 6452 6453 6454 6455 6456 6457 6458 6459 6460 6461
		IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
			  "HW and/or SW RF Kill no longer active, restarting "
			  "device\n");
		if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
			queue_work(priv->workqueue, &priv->restart);
	} else {

		if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
			IWL_DEBUG_RF_KILL("Can not turn radio back on - "
					  "disabled by SW switch\n");
		else
			IWL_WARNING("Radio Frequency Kill Switch is On:\n"
				    "Kill switch must be turned off for "
				    "wireless networking to work.\n");
	}
	mutex_unlock(&priv->mutex);
}

#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)

6462
static void iwl3945_bg_scan_check(struct work_struct *data)
6463
{
6464 6465
	struct iwl3945_priv *priv =
	    container_of(data, struct iwl3945_priv, scan_check.work);
6466 6467 6468 6469 6470 6471 6472 6473 6474 6475

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);
	if (test_bit(STATUS_SCANNING, &priv->status) ||
	    test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
		IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
			  "Scan completion watchdog resetting adapter (%dms)\n",
			  jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
6476

6477
		if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
6478
			iwl3945_send_scan_abort(priv);
6479 6480 6481 6482
	}
	mutex_unlock(&priv->mutex);
}

6483
static void iwl3945_bg_request_scan(struct work_struct *data)
6484
{
6485 6486 6487
	struct iwl3945_priv *priv =
	    container_of(data, struct iwl3945_priv, request_scan);
	struct iwl3945_host_cmd cmd = {
6488
		.id = REPLY_SCAN_CMD,
6489
		.len = sizeof(struct iwl3945_scan_cmd),
6490 6491 6492
		.meta.flags = CMD_SIZE_HUGE,
	};
	int rc = 0;
6493
	struct iwl3945_scan_cmd *scan;
6494 6495 6496 6497 6498 6499 6500 6501
	struct ieee80211_conf *conf = NULL;
	u8 direct_mask;
	int phymode;

	conf = ieee80211_get_hw_conf(priv->hw);

	mutex_lock(&priv->mutex);

6502
	if (!iwl3945_is_ready(priv)) {
6503 6504 6505 6506 6507 6508 6509 6510 6511 6512 6513 6514 6515 6516 6517 6518 6519 6520 6521 6522 6523 6524 6525 6526 6527 6528 6529 6530
		IWL_WARNING("request scan called when driver not ready.\n");
		goto done;
	}

	/* Make sure the scan wasn't cancelled before this queued work
	 * was given the chance to run... */
	if (!test_bit(STATUS_SCANNING, &priv->status))
		goto done;

	/* This should never be called or scheduled if there is currently
	 * a scan active in the hardware. */
	if (test_bit(STATUS_SCAN_HW, &priv->status)) {
		IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
			       "Ignoring second request.\n");
		rc = -EIO;
		goto done;
	}

	if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
		IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
		goto done;
	}

	if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
		IWL_DEBUG_HC("Scan request while abort pending.  Queuing.\n");
		goto done;
	}

6531
	if (iwl3945_is_rfkill(priv)) {
6532 6533 6534 6535 6536 6537 6538 6539 6540 6541 6542 6543 6544 6545 6546
		IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
		goto done;
	}

	if (!test_bit(STATUS_READY, &priv->status)) {
		IWL_DEBUG_HC("Scan request while uninitialized.  Queuing.\n");
		goto done;
	}

	if (!priv->scan_bands) {
		IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
		goto done;
	}

	if (!priv->scan) {
6547
		priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
6548 6549 6550 6551 6552 6553 6554
				     IWL_MAX_SCAN_SIZE, GFP_KERNEL);
		if (!priv->scan) {
			rc = -ENOMEM;
			goto done;
		}
	}
	scan = priv->scan;
6555
	memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
6556 6557 6558 6559

	scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
	scan->quiet_time = IWL_ACTIVE_QUIET_TIME;

6560
	if (iwl3945_is_associated(priv)) {
6561 6562 6563 6564 6565 6566 6567 6568 6569 6570 6571 6572 6573
		u16 interval = 0;
		u32 extra;
		u32 suspend_time = 100;
		u32 scan_suspend_time = 100;
		unsigned long flags;

		IWL_DEBUG_INFO("Scanning while associated...\n");

		spin_lock_irqsave(&priv->lock, flags);
		interval = priv->beacon_int;
		spin_unlock_irqrestore(&priv->lock, flags);

		scan->suspend_time = 0;
6574
		scan->max_out_time = cpu_to_le32(200 * 1024);
6575 6576 6577 6578 6579 6580 6581 6582 6583 6584 6585 6586 6587 6588 6589 6590 6591 6592 6593 6594 6595 6596
		if (!interval)
			interval = suspend_time;
		/*
		 * suspend time format:
		 *  0-19: beacon interval in usec (time before exec.)
		 * 20-23: 0
		 * 24-31: number of beacons (suspend between channels)
		 */

		extra = (suspend_time / interval) << 24;
		scan_suspend_time = 0xFF0FFFFF &
		    (extra | ((suspend_time % interval) * 1024));

		scan->suspend_time = cpu_to_le32(scan_suspend_time);
		IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
			       scan_suspend_time, interval);
	}

	/* We should add the ability for user to lock to PASSIVE ONLY */
	if (priv->one_direct_scan) {
		IWL_DEBUG_SCAN
		    ("Kicking off one direct scan for '%s'\n",
6597
		     iwl3945_escape_essid(priv->direct_ssid,
6598 6599 6600 6601 6602 6603
				      priv->direct_ssid_len));
		scan->direct_scan[0].id = WLAN_EID_SSID;
		scan->direct_scan[0].len = priv->direct_ssid_len;
		memcpy(scan->direct_scan[0].ssid,
		       priv->direct_ssid, priv->direct_ssid_len);
		direct_mask = 1;
6604
	} else if (!iwl3945_is_associated(priv) && priv->essid_len) {
6605 6606 6607 6608 6609 6610 6611 6612 6613 6614
		scan->direct_scan[0].id = WLAN_EID_SSID;
		scan->direct_scan[0].len = priv->essid_len;
		memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
		direct_mask = 1;
	} else
		direct_mask = 0;

	/* We don't build a direct scan probe request; the uCode will do
	 * that based on the direct_mask added to each channel entry */
	scan->tx_cmd.len = cpu_to_le16(
6615
		iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
6616 6617 6618 6619 6620 6621 6622 6623 6624 6625 6626 6627 6628 6629 6630 6631 6632 6633 6634 6635 6636 6637 6638 6639 6640 6641 6642 6643 6644 6645 6646 6647 6648 6649 6650
			IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
	scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
	scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
	scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;

	/* flags + rate selection */

	switch (priv->scan_bands) {
	case 2:
		scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
		scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
		scan->good_CRC_th = 0;
		phymode = MODE_IEEE80211G;
		break;

	case 1:
		scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
		scan->good_CRC_th = IWL_GOOD_CRC_TH;
		phymode = MODE_IEEE80211A;
		break;

	default:
		IWL_WARNING("Invalid scan band count\n");
		goto done;
	}

	/* select Rx antennas */
	scan->flags |= iwl3945_get_antenna_flags(priv);

	if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
		scan->filter_flags = RXON_FILTER_PROMISC_MSK;

	if (direct_mask)
		IWL_DEBUG_SCAN
		    ("Initiating direct scan for %s.\n",
6651
		     iwl3945_escape_essid(priv->essid, priv->essid_len));
6652 6653 6654 6655
	else
		IWL_DEBUG_SCAN("Initiating indirect scan.\n");

	scan->channel_count =
6656
		iwl3945_get_channels_for_scan(
6657 6658 6659 6660 6661
			priv, phymode, 1, /* active */
			direct_mask,
			(void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);

	cmd.len += le16_to_cpu(scan->tx_cmd.len) +
6662
	    scan->channel_count * sizeof(struct iwl3945_scan_channel);
6663 6664 6665 6666
	cmd.data = scan;
	scan->len = cpu_to_le16(cmd.len);

	set_bit(STATUS_SCAN_HW, &priv->status);
6667
	rc = iwl3945_send_cmd_sync(priv, &cmd);
6668 6669 6670 6671 6672 6673 6674 6675 6676 6677
	if (rc)
		goto done;

	queue_delayed_work(priv->workqueue, &priv->scan_check,
			   IWL_SCAN_CHECK_WATCHDOG);

	mutex_unlock(&priv->mutex);
	return;

 done:
6678
	/* inform mac80211 scan aborted */
6679 6680 6681 6682
	queue_work(priv->workqueue, &priv->scan_completed);
	mutex_unlock(&priv->mutex);
}

6683
static void iwl3945_bg_up(struct work_struct *data)
6684
{
6685
	struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, up);
6686 6687 6688 6689 6690

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);
6691
	__iwl3945_up(priv);
6692 6693 6694
	mutex_unlock(&priv->mutex);
}

6695
static void iwl3945_bg_restart(struct work_struct *data)
6696
{
6697
	struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv, restart);
6698 6699 6700 6701

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

6702
	iwl3945_down(priv);
6703 6704 6705
	queue_work(priv->workqueue, &priv->up);
}

6706
static void iwl3945_bg_rx_replenish(struct work_struct *data)
6707
{
6708 6709
	struct iwl3945_priv *priv =
	    container_of(data, struct iwl3945_priv, rx_replenish);
6710 6711 6712 6713 6714

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);
6715
	iwl3945_rx_replenish(priv);
6716 6717 6718
	mutex_unlock(&priv->mutex);
}

6719
static void iwl3945_bg_post_associate(struct work_struct *data)
6720
{
6721
	struct iwl3945_priv *priv = container_of(data, struct iwl3945_priv,
6722 6723 6724 6725
					     post_associate.work);

	int rc = 0;
	struct ieee80211_conf *conf = NULL;
6726
	DECLARE_MAC_BUF(mac);
6727 6728 6729 6730 6731 6732 6733

	if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
		IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
		return;
	}


6734 6735 6736
	IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
			priv->assoc_id,
			print_mac(mac, priv->active_rxon.bssid_addr));
6737 6738 6739 6740 6741 6742

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	mutex_lock(&priv->mutex);

6743 6744 6745 6746
	if (!priv->interface_id || !priv->is_open) {
		mutex_unlock(&priv->mutex);
		return;
	}
6747
	iwl3945_scan_cancel_timeout(priv, 200);
6748

6749 6750 6751
	conf = ieee80211_get_hw_conf(priv->hw);

	priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6752
	iwl3945_commit_rxon(priv);
6753

6754 6755 6756
	memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
	iwl3945_setup_rxon_timing(priv);
	rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
6757 6758 6759 6760 6761 6762 6763 6764 6765 6766 6767 6768 6769 6770 6771 6772 6773 6774 6775 6776 6777 6778 6779 6780 6781 6782 6783 6784
			      sizeof(priv->rxon_timing), &priv->rxon_timing);
	if (rc)
		IWL_WARNING("REPLY_RXON_TIMING failed - "
			    "Attempting to continue.\n");

	priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;

	priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);

	IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
			priv->assoc_id, priv->beacon_int);

	if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
		priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
	else
		priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;

	if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
		if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
			priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
		else
			priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;

		if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
			priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;

	}

6785
	iwl3945_commit_rxon(priv);
6786 6787 6788

	switch (priv->iw_mode) {
	case IEEE80211_IF_TYPE_STA:
6789
		iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
6790 6791 6792 6793 6794
		break;

	case IEEE80211_IF_TYPE_IBSS:

		/* clear out the station table */
6795
		iwl3945_clear_stations_table(priv);
6796

6797 6798
		iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
		iwl3945_add_station(priv, priv->bssid, 0, 0);
6799 6800 6801 6802
		iwl3945_sync_sta(priv, IWL_STA_ID,
				 (priv->phymode == MODE_IEEE80211A)?
				 IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
				 CMD_ASYNC);
6803 6804
		iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
		iwl3945_send_beacon_cmd(priv);
6805 6806 6807 6808 6809

		break;

	default:
		 IWL_ERROR("%s Should not be called in %d mode\n",
6810
			   __FUNCTION__, priv->iw_mode);
6811 6812 6813
		break;
	}

6814
	iwl3945_sequence_reset(priv);
6815

6816
#ifdef CONFIG_IWL3945_QOS
6817
	iwl3945_activate_qos(priv, 0);
6818
#endif /* CONFIG_IWL3945_QOS */
6819 6820 6821
	mutex_unlock(&priv->mutex);
}

6822
static void iwl3945_bg_abort_scan(struct work_struct *work)
6823
{
6824
	struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv, abort_scan);
6825

6826
	if (!iwl3945_is_ready(priv))
6827 6828 6829 6830 6831
		return;

	mutex_lock(&priv->mutex);

	set_bit(STATUS_SCAN_ABORTING, &priv->status);
6832
	iwl3945_send_scan_abort(priv);
6833 6834 6835 6836

	mutex_unlock(&priv->mutex);
}

6837
static void iwl3945_bg_scan_completed(struct work_struct *work)
6838
{
6839 6840
	struct iwl3945_priv *priv =
	    container_of(work, struct iwl3945_priv, scan_completed);
6841 6842 6843 6844 6845 6846 6847 6848 6849 6850 6851

	IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");

	if (test_bit(STATUS_EXIT_PENDING, &priv->status))
		return;

	ieee80211_scan_completed(priv->hw);

	/* Since setting the TXPOWER may have been deferred while
	 * performing the scan, fire one off */
	mutex_lock(&priv->mutex);
6852
	iwl3945_hw_reg_send_txpower(priv);
6853 6854 6855 6856 6857 6858 6859 6860 6861
	mutex_unlock(&priv->mutex);
}

/*****************************************************************************
 *
 * mac80211 entry point functions
 *
 *****************************************************************************/

6862
static int iwl3945_mac_start(struct ieee80211_hw *hw)
6863
{
6864
	struct iwl3945_priv *priv = hw->priv;
6865 6866 6867 6868 6869 6870 6871 6872

	IWL_DEBUG_MAC80211("enter\n");

	/* we should be verifying the device is ready to be opened */
	mutex_lock(&priv->mutex);

	priv->is_open = 1;

6873
	if (!iwl3945_is_rfkill(priv))
6874 6875 6876 6877 6878 6879 6880
		ieee80211_start_queues(priv->hw);

	mutex_unlock(&priv->mutex);
	IWL_DEBUG_MAC80211("leave\n");
	return 0;
}

6881
static void iwl3945_mac_stop(struct ieee80211_hw *hw)
6882
{
6883
	struct iwl3945_priv *priv = hw->priv;
6884 6885

	IWL_DEBUG_MAC80211("enter\n");
6886 6887 6888 6889 6890 6891


	mutex_lock(&priv->mutex);
	/* stop mac, cancel any scan request and clear
	 * RXON_FILTER_ASSOC_MSK BIT
	 */
6892
	priv->is_open = 0;
6893
	iwl3945_scan_cancel_timeout(priv, 100);
6894 6895
	cancel_delayed_work(&priv->post_associate);
	priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
6896
	iwl3945_commit_rxon(priv);
6897 6898
	mutex_unlock(&priv->mutex);

6899 6900 6901
	IWL_DEBUG_MAC80211("leave\n");
}

6902
static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
6903 6904
		      struct ieee80211_tx_control *ctl)
{
6905
	struct iwl3945_priv *priv = hw->priv;
6906 6907 6908 6909 6910 6911 6912 6913 6914 6915 6916

	IWL_DEBUG_MAC80211("enter\n");

	if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
		IWL_DEBUG_MAC80211("leave - monitor\n");
		return -1;
	}

	IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
		     ctl->tx_rate);

6917
	if (iwl3945_tx_skb(priv, skb, ctl))
6918 6919 6920 6921 6922 6923
		dev_kfree_skb_any(skb);

	IWL_DEBUG_MAC80211("leave\n");
	return 0;
}

6924
static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
6925 6926
				 struct ieee80211_if_init_conf *conf)
{
6927
	struct iwl3945_priv *priv = hw->priv;
6928
	unsigned long flags;
6929
	DECLARE_MAC_BUF(mac);
6930 6931 6932 6933 6934

	IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);

	if (priv->interface_id) {
		IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
6935
		return -EOPNOTSUPP;
6936 6937 6938 6939 6940 6941 6942 6943
	}

	spin_lock_irqsave(&priv->lock, flags);
	priv->interface_id = conf->if_id;

	spin_unlock_irqrestore(&priv->lock, flags);

	mutex_lock(&priv->mutex);
6944 6945 6946 6947 6948 6949

	if (conf->mac_addr) {
		IWL_DEBUG_MAC80211("Set: %s\n", print_mac(mac, conf->mac_addr));
		memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
	}

6950
	iwl3945_set_mode(priv, conf->type);
6951 6952 6953 6954 6955 6956 6957 6958

	IWL_DEBUG_MAC80211("leave\n");
	mutex_unlock(&priv->mutex);

	return 0;
}

/**
6959
 * iwl3945_mac_config - mac80211 config callback
6960 6961 6962 6963 6964
 *
 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
 * be set inappropriately and the driver currently sets the hardware up to
 * use it whenever needed.
 */
6965
static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
6966
{
6967 6968
	struct iwl3945_priv *priv = hw->priv;
	const struct iwl3945_channel_info *ch_info;
6969 6970 6971 6972 6973
	unsigned long flags;

	mutex_lock(&priv->mutex);
	IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);

6974
	if (!iwl3945_is_ready(priv)) {
6975 6976 6977 6978 6979 6980
		IWL_DEBUG_MAC80211("leave - not ready\n");
		mutex_unlock(&priv->mutex);
		return -EIO;
	}

	/* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
6981
	 * what is exposed through include/ declarations */
6982
	if (unlikely(!iwl3945_param_disable_hw_scan &&
6983 6984 6985 6986 6987 6988 6989 6990
		     test_bit(STATUS_SCANNING, &priv->status))) {
		IWL_DEBUG_MAC80211("leave - scanning\n");
		mutex_unlock(&priv->mutex);
		return 0;
	}

	spin_lock_irqsave(&priv->lock, flags);

6991
	ch_info = iwl3945_get_channel_info(priv, conf->phymode, conf->channel);
6992 6993 6994 6995 6996 6997 6998 6999 7000
	if (!is_channel_valid(ch_info)) {
		IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
			       conf->channel, conf->phymode);
		IWL_DEBUG_MAC80211("leave - invalid channel\n");
		spin_unlock_irqrestore(&priv->lock, flags);
		mutex_unlock(&priv->mutex);
		return -EINVAL;
	}

7001
	iwl3945_set_rxon_channel(priv, conf->phymode, conf->channel);
7002

7003
	iwl3945_set_flags_for_phymode(priv, conf->phymode);
7004 7005 7006 7007

	/* The list of supported rates and rate mask can be different
	 * for each phymode; since the phymode may have changed, reset
	 * the rate mask to what mac80211 lists */
7008
	iwl3945_set_rate(priv);
7009 7010 7011 7012 7013

	spin_unlock_irqrestore(&priv->lock, flags);

#ifdef IEEE80211_CONF_CHANNEL_SWITCH
	if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
7014
		iwl3945_hw_channel_switch(priv, conf->channel);
7015 7016 7017 7018 7019
		mutex_unlock(&priv->mutex);
		return 0;
	}
#endif

7020
	iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
7021 7022 7023 7024 7025 7026 7027

	if (!conf->radio_enabled) {
		IWL_DEBUG_MAC80211("leave - radio disabled\n");
		mutex_unlock(&priv->mutex);
		return 0;
	}

7028
	if (iwl3945_is_rfkill(priv)) {
7029 7030 7031 7032 7033
		IWL_DEBUG_MAC80211("leave - RF kill\n");
		mutex_unlock(&priv->mutex);
		return -EIO;
	}

7034
	iwl3945_set_rate(priv);
7035 7036 7037

	if (memcmp(&priv->active_rxon,
		   &priv->staging_rxon, sizeof(priv->staging_rxon)))
7038
		iwl3945_commit_rxon(priv);
7039 7040 7041 7042 7043 7044 7045 7046 7047 7048
	else
		IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");

	IWL_DEBUG_MAC80211("leave\n");

	mutex_unlock(&priv->mutex);

	return 0;
}

7049
static void iwl3945_config_ap(struct iwl3945_priv *priv)
7050 7051 7052 7053 7054 7055 7056 7057 7058 7059 7060
{
	int rc = 0;

	if (priv->status & STATUS_EXIT_PENDING)
		return;

	/* The following should be done only at AP bring up */
	if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {

		/* RXON - unassoc (to set timing command) */
		priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7061
		iwl3945_commit_rxon(priv);
7062 7063

		/* RXON Timing */
7064 7065 7066
		memset(&priv->rxon_timing, 0, sizeof(struct iwl3945_rxon_time_cmd));
		iwl3945_setup_rxon_timing(priv);
		rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
7067 7068 7069 7070 7071 7072 7073 7074 7075 7076 7077 7078 7079 7080 7081 7082 7083 7084 7085 7086 7087 7088 7089 7090 7091 7092 7093 7094 7095
				sizeof(priv->rxon_timing), &priv->rxon_timing);
		if (rc)
			IWL_WARNING("REPLY_RXON_TIMING failed - "
					"Attempting to continue.\n");

		/* FIXME: what should be the assoc_id for AP? */
		priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
		if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
			priv->staging_rxon.flags |=
				RXON_FLG_SHORT_PREAMBLE_MSK;
		else
			priv->staging_rxon.flags &=
				~RXON_FLG_SHORT_PREAMBLE_MSK;

		if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
			if (priv->assoc_capability &
				WLAN_CAPABILITY_SHORT_SLOT_TIME)
				priv->staging_rxon.flags |=
					RXON_FLG_SHORT_SLOT_MSK;
			else
				priv->staging_rxon.flags &=
					~RXON_FLG_SHORT_SLOT_MSK;

			if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
				priv->staging_rxon.flags &=
					~RXON_FLG_SHORT_SLOT_MSK;
		}
		/* restore RXON assoc */
		priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
7096 7097
		iwl3945_commit_rxon(priv);
		iwl3945_add_station(priv, iwl3945_broadcast_addr, 0, 0);
7098
	}
7099
	iwl3945_send_beacon_cmd(priv);
7100 7101 7102 7103 7104 7105

	/* FIXME - we need to add code here to detect a totally new
	 * configuration, reset the AP, unassoc, rxon timing, assoc,
	 * clear sta table, add BCAST sta... */
}

7106
static int iwl3945_mac_config_interface(struct ieee80211_hw *hw, int if_id,
7107 7108
				    struct ieee80211_if_conf *conf)
{
7109
	struct iwl3945_priv *priv = hw->priv;
7110
	DECLARE_MAC_BUF(mac);
7111 7112 7113 7114 7115 7116
	unsigned long flags;
	int rc;

	if (conf == NULL)
		return -EIO;

7117 7118
	/* XXX: this MUST use conf->mac_addr */

7119 7120 7121 7122 7123 7124 7125 7126 7127 7128 7129
	if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
	    (!conf->beacon || !conf->ssid_len)) {
		IWL_DEBUG_MAC80211
		    ("Leaving in AP mode because HostAPD is not ready.\n");
		return 0;
	}

	mutex_lock(&priv->mutex);

	IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
	if (conf->bssid)
7130 7131
		IWL_DEBUG_MAC80211("bssid: %s\n",
				   print_mac(mac, conf->bssid));
7132

7133 7134 7135
/*
 * very dubious code was here; the probe filtering flag is never set:
 *
7136 7137
	if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
	    !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
7138 7139
 */
	if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
7140 7141 7142 7143 7144 7145 7146 7147 7148 7149 7150 7151 7152 7153 7154
		IWL_DEBUG_MAC80211("leave - scanning\n");
		mutex_unlock(&priv->mutex);
		return 0;
	}

	if (priv->interface_id != if_id) {
		IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
		mutex_unlock(&priv->mutex);
		return 0;
	}

	if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
		if (!conf->bssid) {
			conf->bssid = priv->mac_addr;
			memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
7155 7156
			IWL_DEBUG_MAC80211("bssid was set to: %s\n",
					   print_mac(mac, conf->bssid));
7157 7158 7159 7160 7161 7162 7163 7164 7165 7166 7167
		}
		if (priv->ibss_beacon)
			dev_kfree_skb(priv->ibss_beacon);

		priv->ibss_beacon = conf->beacon;
	}

	if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
	    !is_multicast_ether_addr(conf->bssid)) {
		/* If there is currently a HW scan going on in the background
		 * then we need to cancel it else the RXON below will fail. */
7168
		if (iwl3945_scan_cancel_timeout(priv, 100)) {
7169 7170 7171 7172 7173 7174 7175 7176 7177 7178 7179 7180 7181 7182 7183
			IWL_WARNING("Aborted scan still in progress "
				    "after 100ms\n");
			IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
			mutex_unlock(&priv->mutex);
			return -EAGAIN;
		}
		memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);

		/* TODO: Audit driver for usage of these members and see
		 * if mac80211 deprecates them (priv->bssid looks like it
		 * shouldn't be there, but I haven't scanned the IBSS code
		 * to verify) - jpk */
		memcpy(priv->bssid, conf->bssid, ETH_ALEN);

		if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7184
			iwl3945_config_ap(priv);
7185
		else {
7186
			rc = iwl3945_commit_rxon(priv);
7187
			if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
7188
				iwl3945_add_station(priv,
7189
					priv->active_rxon.bssid_addr, 1, 0);
7190 7191 7192
		}

	} else {
7193
		iwl3945_scan_cancel_timeout(priv, 100);
7194
		priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7195
		iwl3945_commit_rxon(priv);
7196 7197 7198 7199 7200 7201 7202 7203 7204 7205 7206 7207 7208 7209 7210 7211 7212
	}

	spin_lock_irqsave(&priv->lock, flags);
	if (!conf->ssid_len)
		memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
	else
		memcpy(priv->essid, conf->ssid, conf->ssid_len);

	priv->essid_len = conf->ssid_len;
	spin_unlock_irqrestore(&priv->lock, flags);

	IWL_DEBUG_MAC80211("leave\n");
	mutex_unlock(&priv->mutex);

	return 0;
}

7213
static void iwl3945_configure_filter(struct ieee80211_hw *hw,
7214 7215 7216 7217 7218 7219
				 unsigned int changed_flags,
				 unsigned int *total_flags,
				 int mc_count, struct dev_addr_list *mc_list)
{
	/*
	 * XXX: dummy
7220
	 * see also iwl3945_connection_init_rx_config
7221 7222 7223 7224
	 */
	*total_flags = 0;
}

7225
static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
7226 7227
				     struct ieee80211_if_init_conf *conf)
{
7228
	struct iwl3945_priv *priv = hw->priv;
7229 7230 7231 7232

	IWL_DEBUG_MAC80211("enter\n");

	mutex_lock(&priv->mutex);
7233

7234
	iwl3945_scan_cancel_timeout(priv, 100);
7235 7236
	cancel_delayed_work(&priv->post_associate);
	priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7237
	iwl3945_commit_rxon(priv);
7238

7239 7240 7241 7242 7243 7244 7245 7246 7247 7248 7249 7250 7251
	if (priv->interface_id == conf->if_id) {
		priv->interface_id = 0;
		memset(priv->bssid, 0, ETH_ALEN);
		memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
		priv->essid_len = 0;
	}
	mutex_unlock(&priv->mutex);

	IWL_DEBUG_MAC80211("leave\n");

}

#define IWL_DELAY_NEXT_SCAN (HZ*2)
7252
static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
7253 7254 7255
{
	int rc = 0;
	unsigned long flags;
7256
	struct iwl3945_priv *priv = hw->priv;
7257 7258 7259

	IWL_DEBUG_MAC80211("enter\n");

7260
	mutex_lock(&priv->mutex);
7261 7262
	spin_lock_irqsave(&priv->lock, flags);

7263
	if (!iwl3945_is_ready_rf(priv)) {
7264 7265 7266 7267 7268 7269 7270 7271 7272 7273 7274 7275 7276 7277 7278 7279 7280 7281 7282 7283 7284
		rc = -EIO;
		IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
		goto out_unlock;
	}

	if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {	/* APs don't scan */
		rc = -EIO;
		IWL_ERROR("ERROR: APs don't scan\n");
		goto out_unlock;
	}

	/* if we just finished scan ask for delay */
	if (priv->last_scan_jiffies &&
	    time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
		       jiffies)) {
		rc = -EAGAIN;
		goto out_unlock;
	}
	if (len) {
		IWL_DEBUG_SCAN("direct scan for  "
			       "%s [%d]\n ",
7285
			       iwl3945_escape_essid(ssid, len), (int)len);
7286 7287 7288 7289 7290

		priv->one_direct_scan = 1;
		priv->direct_ssid_len = (u8)
		    min((u8) len, (u8) IW_ESSID_MAX_SIZE);
		memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
7291 7292
	} else
		priv->one_direct_scan = 0;
7293

7294
	rc = iwl3945_scan_initiate(priv);
7295 7296 7297 7298 7299

	IWL_DEBUG_MAC80211("leave\n");

out_unlock:
	spin_unlock_irqrestore(&priv->lock, flags);
7300
	mutex_unlock(&priv->mutex);
7301 7302 7303 7304

	return rc;
}

7305
static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
7306 7307 7308
			   const u8 *local_addr, const u8 *addr,
			   struct ieee80211_key_conf *key)
{
7309
	struct iwl3945_priv *priv = hw->priv;
7310 7311 7312 7313 7314
	int rc = 0;
	u8 sta_id;

	IWL_DEBUG_MAC80211("enter\n");

7315
	if (!iwl3945_param_hwcrypto) {
7316 7317 7318 7319 7320 7321 7322 7323
		IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
		return -EOPNOTSUPP;
	}

	if (is_zero_ether_addr(addr))
		/* only support pairwise keys */
		return -EOPNOTSUPP;

7324
	sta_id = iwl3945_hw_find_station(priv, addr);
7325
	if (sta_id == IWL_INVALID_STATION) {
7326 7327 7328 7329
		DECLARE_MAC_BUF(mac);

		IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
				   print_mac(mac, addr));
7330 7331 7332 7333 7334
		return -EINVAL;
	}

	mutex_lock(&priv->mutex);

7335
	iwl3945_scan_cancel_timeout(priv, 100);
7336

7337 7338
	switch (cmd) {
	case  SET_KEY:
7339
		rc = iwl3945_update_sta_key_info(priv, key, sta_id);
7340
		if (!rc) {
7341 7342
			iwl3945_set_rxon_hwcrypto(priv, 1);
			iwl3945_commit_rxon(priv);
7343 7344 7345 7346 7347 7348
			key->hw_key_idx = sta_id;
			IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
			key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
		}
		break;
	case DISABLE_KEY:
7349
		rc = iwl3945_clear_sta_key_info(priv, sta_id);
7350
		if (!rc) {
7351 7352
			iwl3945_set_rxon_hwcrypto(priv, 0);
			iwl3945_commit_rxon(priv);
7353 7354 7355 7356 7357 7358 7359 7360 7361 7362 7363 7364 7365
			IWL_DEBUG_MAC80211("disable hwcrypto key\n");
		}
		break;
	default:
		rc = -EINVAL;
	}

	IWL_DEBUG_MAC80211("leave\n");
	mutex_unlock(&priv->mutex);

	return rc;
}

7366
static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, int queue,
7367 7368
			   const struct ieee80211_tx_queue_params *params)
{
7369
	struct iwl3945_priv *priv = hw->priv;
7370
#ifdef CONFIG_IWL3945_QOS
7371 7372 7373 7374 7375 7376
	unsigned long flags;
	int q;
#endif /* CONFIG_IWL_QOS */

	IWL_DEBUG_MAC80211("enter\n");

7377
	if (!iwl3945_is_ready_rf(priv)) {
7378 7379 7380 7381 7382 7383 7384 7385 7386
		IWL_DEBUG_MAC80211("leave - RF not ready\n");
		return -EIO;
	}

	if (queue >= AC_NUM) {
		IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
		return 0;
	}

7387
#ifdef CONFIG_IWL3945_QOS
7388 7389 7390 7391 7392 7393 7394 7395 7396 7397 7398 7399 7400 7401 7402 7403 7404 7405 7406 7407 7408 7409
	if (!priv->qos_data.qos_enable) {
		priv->qos_data.qos_active = 0;
		IWL_DEBUG_MAC80211("leave - qos not enabled\n");
		return 0;
	}
	q = AC_NUM - 1 - queue;

	spin_lock_irqsave(&priv->lock, flags);

	priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
	priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
	priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
	priv->qos_data.def_qos_parm.ac[q].edca_txop =
			cpu_to_le16((params->burst_time * 100));

	priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
	priv->qos_data.qos_active = 1;

	spin_unlock_irqrestore(&priv->lock, flags);

	mutex_lock(&priv->mutex);
	if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
7410 7411 7412
		iwl3945_activate_qos(priv, 1);
	else if (priv->assoc_id && iwl3945_is_associated(priv))
		iwl3945_activate_qos(priv, 0);
7413 7414 7415

	mutex_unlock(&priv->mutex);

7416
#endif /*CONFIG_IWL3945_QOS */
7417 7418 7419 7420 7421

	IWL_DEBUG_MAC80211("leave\n");
	return 0;
}

7422
static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
7423 7424
				struct ieee80211_tx_queue_stats *stats)
{
7425
	struct iwl3945_priv *priv = hw->priv;
7426
	int i, avail;
7427 7428
	struct iwl3945_tx_queue *txq;
	struct iwl3945_queue *q;
7429 7430 7431 7432
	unsigned long flags;

	IWL_DEBUG_MAC80211("enter\n");

7433
	if (!iwl3945_is_ready_rf(priv)) {
7434 7435 7436 7437 7438 7439 7440 7441 7442
		IWL_DEBUG_MAC80211("leave - RF not ready\n");
		return -EIO;
	}

	spin_lock_irqsave(&priv->lock, flags);

	for (i = 0; i < AC_NUM; i++) {
		txq = &priv->txq[i];
		q = &txq->q;
7443
		avail = iwl3945_queue_space(q);
7444 7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7455 7456

		stats->data[i].len = q->n_window - avail;
		stats->data[i].limit = q->n_window - q->high_mark;
		stats->data[i].count = q->n_window;

	}
	spin_unlock_irqrestore(&priv->lock, flags);

	IWL_DEBUG_MAC80211("leave\n");

	return 0;
}

7457
static int iwl3945_mac_get_stats(struct ieee80211_hw *hw,
7458 7459 7460 7461 7462 7463 7464 7465
			     struct ieee80211_low_level_stats *stats)
{
	IWL_DEBUG_MAC80211("enter\n");
	IWL_DEBUG_MAC80211("leave\n");

	return 0;
}

7466
static u64 iwl3945_mac_get_tsf(struct ieee80211_hw *hw)
7467 7468 7469 7470 7471 7472 7473
{
	IWL_DEBUG_MAC80211("enter\n");
	IWL_DEBUG_MAC80211("leave\n");

	return 0;
}

7474
static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
7475
{
7476
	struct iwl3945_priv *priv = hw->priv;
7477 7478 7479 7480 7481
	unsigned long flags;

	mutex_lock(&priv->mutex);
	IWL_DEBUG_MAC80211("enter\n");

7482
#ifdef CONFIG_IWL3945_QOS
7483
	iwl3945_reset_qos(priv);
7484 7485 7486 7487 7488 7489 7490 7491 7492 7493 7494 7495 7496 7497 7498 7499 7500 7501 7502 7503 7504 7505
#endif
	cancel_delayed_work(&priv->post_associate);

	spin_lock_irqsave(&priv->lock, flags);
	priv->assoc_id = 0;
	priv->assoc_capability = 0;
	priv->call_post_assoc_from_beacon = 0;

	/* new association get rid of ibss beacon skb */
	if (priv->ibss_beacon)
		dev_kfree_skb(priv->ibss_beacon);

	priv->ibss_beacon = NULL;

	priv->beacon_int = priv->hw->conf.beacon_int;
	priv->timestamp1 = 0;
	priv->timestamp0 = 0;
	if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
		priv->beacon_int = 0;

	spin_unlock_irqrestore(&priv->lock, flags);

7506 7507 7508 7509
	/* we are restarting association process
	 * clear RXON_FILTER_ASSOC_MSK bit
	*/
	if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
7510
		iwl3945_scan_cancel_timeout(priv, 100);
7511
		priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
7512
		iwl3945_commit_rxon(priv);
7513 7514
	}

7515 7516
	/* Per mac80211.h: This is only used in IBSS mode... */
	if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
7517

7518 7519 7520 7521 7522
		IWL_DEBUG_MAC80211("leave - not in IBSS\n");
		mutex_unlock(&priv->mutex);
		return;
	}

7523
	if (!iwl3945_is_ready_rf(priv)) {
7524 7525 7526 7527 7528 7529 7530
		IWL_DEBUG_MAC80211("leave - not ready\n");
		mutex_unlock(&priv->mutex);
		return;
	}

	priv->only_active_channel = 0;

7531
	iwl3945_set_rate(priv);
7532 7533 7534 7535 7536 7537 7538

	mutex_unlock(&priv->mutex);

	IWL_DEBUG_MAC80211("leave\n");

}

7539
static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
7540 7541
				 struct ieee80211_tx_control *control)
{
7542
	struct iwl3945_priv *priv = hw->priv;
7543 7544 7545 7546 7547
	unsigned long flags;

	mutex_lock(&priv->mutex);
	IWL_DEBUG_MAC80211("enter\n");

7548
	if (!iwl3945_is_ready_rf(priv)) {
7549 7550 7551 7552 7553 7554 7555 7556 7557 7558 7559 7560 7561 7562 7563 7564 7565 7566 7567 7568 7569 7570 7571
		IWL_DEBUG_MAC80211("leave - RF not ready\n");
		mutex_unlock(&priv->mutex);
		return -EIO;
	}

	if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
		IWL_DEBUG_MAC80211("leave - not IBSS\n");
		mutex_unlock(&priv->mutex);
		return -EIO;
	}

	spin_lock_irqsave(&priv->lock, flags);

	if (priv->ibss_beacon)
		dev_kfree_skb(priv->ibss_beacon);

	priv->ibss_beacon = skb;

	priv->assoc_id = 0;

	IWL_DEBUG_MAC80211("leave\n");
	spin_unlock_irqrestore(&priv->lock, flags);

7572
#ifdef CONFIG_IWL3945_QOS
7573
	iwl3945_reset_qos(priv);
7574 7575 7576 7577 7578 7579 7580 7581 7582 7583 7584 7585 7586 7587 7588
#endif

	queue_work(priv->workqueue, &priv->post_associate.work);

	mutex_unlock(&priv->mutex);

	return 0;
}

/*****************************************************************************
 *
 * sysfs attributes
 *
 *****************************************************************************/

7589
#ifdef CONFIG_IWL3945_DEBUG
7590 7591 7592 7593 7594 7595 7596 7597 7598 7599 7600

/*
 * The following adds a new attribute to the sysfs representation
 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
 * used for controlling the debug level.
 *
 * See the level definitions in iwl for details.
 */

static ssize_t show_debug_level(struct device_driver *d, char *buf)
{
7601
	return sprintf(buf, "0x%08X\n", iwl3945_debug_level);
7602 7603 7604 7605 7606 7607 7608 7609 7610 7611 7612 7613
}
static ssize_t store_debug_level(struct device_driver *d,
				 const char *buf, size_t count)
{
	char *p = (char *)buf;
	u32 val;

	val = simple_strtoul(p, &p, 0);
	if (p == buf)
		printk(KERN_INFO DRV_NAME
		       ": %s is not in hex or decimal form.\n", buf);
	else
7614
		iwl3945_debug_level = val;
7615 7616 7617 7618 7619 7620 7621

	return strnlen(buf, count);
}

static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
		   show_debug_level, store_debug_level);

7622
#endif /* CONFIG_IWL3945_DEBUG */
7623 7624 7625 7626 7627 7628 7629 7630 7631 7632

static ssize_t show_rf_kill(struct device *d,
			    struct device_attribute *attr, char *buf)
{
	/*
	 * 0 - RF kill not enabled
	 * 1 - SW based RF kill active (sysfs)
	 * 2 - HW based RF kill active
	 * 3 - Both HW and SW based RF kill active
	 */
7633
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7634 7635 7636 7637 7638 7639 7640 7641 7642 7643
	int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
		  (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);

	return sprintf(buf, "%i\n", val);
}

static ssize_t store_rf_kill(struct device *d,
			     struct device_attribute *attr,
			     const char *buf, size_t count)
{
7644
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7645 7646

	mutex_lock(&priv->mutex);
7647
	iwl3945_radio_kill_sw(priv, buf[0] == '1');
7648 7649 7650 7651 7652 7653 7654 7655 7656 7657
	mutex_unlock(&priv->mutex);

	return count;
}

static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);

static ssize_t show_temperature(struct device *d,
				struct device_attribute *attr, char *buf)
{
7658
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7659

7660
	if (!iwl3945_is_alive(priv))
7661 7662
		return -EAGAIN;

7663
	return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
7664 7665 7666 7667 7668 7669 7670 7671
}

static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);

static ssize_t show_rs_window(struct device *d,
			      struct device_attribute *attr,
			      char *buf)
{
7672 7673
	struct iwl3945_priv *priv = d->driver_data;
	return iwl3945_fill_rs_info(priv->hw, buf, IWL_AP_ID);
7674 7675 7676 7677 7678 7679
}
static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);

static ssize_t show_tx_power(struct device *d,
			     struct device_attribute *attr, char *buf)
{
7680
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7681 7682 7683 7684 7685 7686 7687
	return sprintf(buf, "%d\n", priv->user_txpower_limit);
}

static ssize_t store_tx_power(struct device *d,
			      struct device_attribute *attr,
			      const char *buf, size_t count)
{
7688
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7689 7690 7691 7692 7693 7694 7695 7696
	char *p = (char *)buf;
	u32 val;

	val = simple_strtoul(p, &p, 10);
	if (p == buf)
		printk(KERN_INFO DRV_NAME
		       ": %s is not in decimal form.\n", buf);
	else
7697
		iwl3945_hw_reg_set_txpower(priv, val);
7698 7699 7700 7701 7702 7703 7704 7705 7706

	return count;
}

static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);

static ssize_t show_flags(struct device *d,
			  struct device_attribute *attr, char *buf)
{
7707
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7708 7709 7710 7711 7712 7713 7714 7715

	return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
}

static ssize_t store_flags(struct device *d,
			   struct device_attribute *attr,
			   const char *buf, size_t count)
{
7716
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7717 7718 7719 7720 7721
	u32 flags = simple_strtoul(buf, NULL, 0);

	mutex_lock(&priv->mutex);
	if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
		/* Cancel any currently running scans... */
7722
		if (iwl3945_scan_cancel_timeout(priv, 100))
7723 7724 7725 7726 7727
			IWL_WARNING("Could not cancel scan.\n");
		else {
			IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
				       flags);
			priv->staging_rxon.flags = cpu_to_le32(flags);
7728
			iwl3945_commit_rxon(priv);
7729 7730 7731 7732 7733 7734 7735 7736 7737 7738 7739 7740
		}
	}
	mutex_unlock(&priv->mutex);

	return count;
}

static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);

static ssize_t show_filter_flags(struct device *d,
				 struct device_attribute *attr, char *buf)
{
7741
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7742 7743 7744 7745 7746 7747 7748 7749 7750

	return sprintf(buf, "0x%04X\n",
		le32_to_cpu(priv->active_rxon.filter_flags));
}

static ssize_t store_filter_flags(struct device *d,
				  struct device_attribute *attr,
				  const char *buf, size_t count)
{
7751
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7752 7753 7754 7755 7756
	u32 filter_flags = simple_strtoul(buf, NULL, 0);

	mutex_lock(&priv->mutex);
	if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
		/* Cancel any currently running scans... */
7757
		if (iwl3945_scan_cancel_timeout(priv, 100))
7758 7759 7760 7761 7762 7763
			IWL_WARNING("Could not cancel scan.\n");
		else {
			IWL_DEBUG_INFO("Committing rxon.filter_flags = "
				       "0x%04X\n", filter_flags);
			priv->staging_rxon.filter_flags =
				cpu_to_le32(filter_flags);
7764
			iwl3945_commit_rxon(priv);
7765 7766 7767 7768 7769 7770 7771 7772 7773 7774 7775 7776 7777
		}
	}
	mutex_unlock(&priv->mutex);

	return count;
}

static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
		   store_filter_flags);

static ssize_t show_tune(struct device *d,
			 struct device_attribute *attr, char *buf)
{
7778
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7779 7780 7781 7782 7783 7784

	return sprintf(buf, "0x%04X\n",
		       (priv->phymode << 8) |
			le16_to_cpu(priv->active_rxon.channel));
}

7785
static void iwl3945_set_flags_for_phymode(struct iwl3945_priv *priv, u8 phymode);
7786 7787 7788 7789 7790

static ssize_t store_tune(struct device *d,
			  struct device_attribute *attr,
			  const char *buf, size_t count)
{
7791
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
7792 7793 7794 7795 7796 7797 7798 7799 7800 7801
	char *p = (char *)buf;
	u16 tune = simple_strtoul(p, &p, 0);
	u8 phymode = (tune >> 8) & 0xff;
	u16 channel = tune & 0xff;

	IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);

	mutex_lock(&priv->mutex);
	if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
	    (priv->phymode != phymode)) {
7802
		const struct iwl3945_channel_info *ch_info;
7803

7804
		ch_info = iwl3945_get_channel_info(priv, phymode, channel);
7805 7806 7807 7808 7809 7810 7811 7812
		if (!ch_info) {
			IWL_WARNING("Requested invalid phymode/channel "
				    "combination: %d %d\n", phymode, channel);
			mutex_unlock(&priv->mutex);
			return -EINVAL;
		}

		/* Cancel any currently running scans... */
7813
		if (iwl3945_scan_cancel_timeout(priv, 100))
7814 7815 7816 7817 7818 7819
			IWL_WARNING("Could not cancel scan.\n");
		else {
			IWL_DEBUG_INFO("Committing phymode and "
				       "rxon.channel = %d %d\n",
				       phymode, channel);

7820 7821
			iwl3945_set_rxon_channel(priv, phymode, channel);
			iwl3945_set_flags_for_phymode(priv, phymode);
7822

7823 7824
			iwl3945_set_rate(priv);
			iwl3945_commit_rxon(priv);
7825 7826 7827 7828 7829 7830 7831 7832 7833
		}
	}
	mutex_unlock(&priv->mutex);

	return count;
}

static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);

7834
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
7835 7836 7837 7838

static ssize_t show_measurement(struct device *d,
				struct device_attribute *attr, char *buf)
{
7839 7840
	struct iwl3945_priv *priv = dev_get_drvdata(d);
	struct iwl3945_spectrum_notification measure_report;
7841 7842 7843 7844 7845 7846 7847 7848 7849 7850 7851 7852 7853 7854 7855 7856 7857 7858 7859 7860 7861 7862 7863 7864 7865 7866 7867 7868 7869 7870 7871
	u32 size = sizeof(measure_report), len = 0, ofs = 0;
	u8 *data = (u8 *) & measure_report;
	unsigned long flags;

	spin_lock_irqsave(&priv->lock, flags);
	if (!(priv->measurement_status & MEASUREMENT_READY)) {
		spin_unlock_irqrestore(&priv->lock, flags);
		return 0;
	}
	memcpy(&measure_report, &priv->measure_report, size);
	priv->measurement_status = 0;
	spin_unlock_irqrestore(&priv->lock, flags);

	while (size && (PAGE_SIZE - len)) {
		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
				   PAGE_SIZE - len, 1);
		len = strlen(buf);
		if (PAGE_SIZE - len)
			buf[len++] = '\n';

		ofs += 16;
		size -= min(size, 16U);
	}

	return len;
}

static ssize_t store_measurement(struct device *d,
				 struct device_attribute *attr,
				 const char *buf, size_t count)
{
7872
	struct iwl3945_priv *priv = dev_get_drvdata(d);
7873 7874 7875 7876 7877 7878 7879 7880 7881 7882 7883 7884 7885 7886 7887 7888 7889 7890 7891 7892 7893 7894 7895 7896 7897
	struct ieee80211_measurement_params params = {
		.channel = le16_to_cpu(priv->active_rxon.channel),
		.start_time = cpu_to_le64(priv->last_tsf),
		.duration = cpu_to_le16(1),
	};
	u8 type = IWL_MEASURE_BASIC;
	u8 buffer[32];
	u8 channel;

	if (count) {
		char *p = buffer;
		strncpy(buffer, buf, min(sizeof(buffer), count));
		channel = simple_strtoul(p, NULL, 0);
		if (channel)
			params.channel = channel;

		p = buffer;
		while (*p && *p != ' ')
			p++;
		if (*p)
			type = simple_strtoul(p + 1, NULL, 0);
	}

	IWL_DEBUG_INFO("Invoking measurement of type %d on "
		       "channel %d (for '%s')\n", type, params.channel, buf);
7898
	iwl3945_get_measurement(priv, &params, type);
7899 7900 7901 7902 7903 7904

	return count;
}

static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
		   show_measurement, store_measurement);
7905
#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
7906 7907 7908 7909

static ssize_t show_rate(struct device *d,
			 struct device_attribute *attr, char *buf)
{
7910
	struct iwl3945_priv *priv = dev_get_drvdata(d);
7911 7912 7913 7914 7915 7916 7917 7918 7919 7920
	unsigned long flags;
	int i;

	spin_lock_irqsave(&priv->sta_lock, flags);
	if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
		i = priv->stations[IWL_AP_ID].current_rate.s.rate;
	else
		i = priv->stations[IWL_STA_ID].current_rate.s.rate;
	spin_unlock_irqrestore(&priv->sta_lock, flags);

7921
	i = iwl3945_rate_index_from_plcp(i);
7922 7923 7924 7925
	if (i == -1)
		return sprintf(buf, "0\n");

	return sprintf(buf, "%d%s\n",
7926 7927
		       (iwl3945_rates[i].ieee >> 1),
		       (iwl3945_rates[i].ieee & 0x1) ? ".5" : "");
7928 7929 7930 7931 7932 7933 7934 7935
}

static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);

static ssize_t store_retry_rate(struct device *d,
				struct device_attribute *attr,
				const char *buf, size_t count)
{
7936
	struct iwl3945_priv *priv = dev_get_drvdata(d);
7937 7938 7939 7940 7941 7942 7943 7944 7945 7946 7947

	priv->retry_rate = simple_strtoul(buf, NULL, 0);
	if (priv->retry_rate <= 0)
		priv->retry_rate = 1;

	return count;
}

static ssize_t show_retry_rate(struct device *d,
			       struct device_attribute *attr, char *buf)
{
7948
	struct iwl3945_priv *priv = dev_get_drvdata(d);
7949 7950 7951 7952 7953 7954 7955 7956 7957 7958
	return sprintf(buf, "%d", priv->retry_rate);
}

static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
		   store_retry_rate);

static ssize_t store_power_level(struct device *d,
				 struct device_attribute *attr,
				 const char *buf, size_t count)
{
7959
	struct iwl3945_priv *priv = dev_get_drvdata(d);
7960 7961 7962 7963 7964 7965
	int rc;
	int mode;

	mode = simple_strtoul(buf, NULL, 0);
	mutex_lock(&priv->mutex);

7966
	if (!iwl3945_is_ready(priv)) {
7967 7968 7969 7970 7971 7972 7973 7974 7975 7976
		rc = -EAGAIN;
		goto out;
	}

	if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
		mode = IWL_POWER_AC;
	else
		mode |= IWL_POWER_ENABLED;

	if (mode != priv->power_mode) {
7977
		rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
7978 7979 7980 7981 7982 7983 7984 7985 7986 7987 7988 7989 7990 7991 7992 7993 7994 7995 7996 7997 7998 7999 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 8010 8011 8012
		if (rc) {
			IWL_DEBUG_MAC80211("failed setting power mode.\n");
			goto out;
		}
		priv->power_mode = mode;
	}

	rc = count;

 out:
	mutex_unlock(&priv->mutex);
	return rc;
}

#define MAX_WX_STRING 80

/* Values are in microsecond */
static const s32 timeout_duration[] = {
	350000,
	250000,
	75000,
	37000,
	25000,
};
static const s32 period_duration[] = {
	400000,
	700000,
	1000000,
	1000000,
	1000000
};

static ssize_t show_power_level(struct device *d,
				struct device_attribute *attr, char *buf)
{
8013
	struct iwl3945_priv *priv = dev_get_drvdata(d);
8014 8015 8016 8017 8018 8019 8020 8021 8022 8023 8024 8025 8026 8027 8028 8029 8030 8031 8032 8033 8034 8035 8036 8037 8038 8039 8040 8041 8042 8043 8044 8045 8046 8047
	int level = IWL_POWER_LEVEL(priv->power_mode);
	char *p = buf;

	p += sprintf(p, "%d ", level);
	switch (level) {
	case IWL_POWER_MODE_CAM:
	case IWL_POWER_AC:
		p += sprintf(p, "(AC)");
		break;
	case IWL_POWER_BATTERY:
		p += sprintf(p, "(BATTERY)");
		break;
	default:
		p += sprintf(p,
			     "(Timeout %dms, Period %dms)",
			     timeout_duration[level - 1] / 1000,
			     period_duration[level - 1] / 1000);
	}

	if (!(priv->power_mode & IWL_POWER_ENABLED))
		p += sprintf(p, " OFF\n");
	else
		p += sprintf(p, " \n");

	return (p - buf + 1);

}

static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
		   store_power_level);

static ssize_t show_channels(struct device *d,
			     struct device_attribute *attr, char *buf)
{
8048
	struct iwl3945_priv *priv = dev_get_drvdata(d);
8049 8050 8051 8052 8053
	int len = 0, i;
	struct ieee80211_channel *channels = NULL;
	const struct ieee80211_hw_mode *hw_mode = NULL;
	int count = 0;

8054
	if (!iwl3945_is_ready(priv))
8055 8056
		return -EAGAIN;

8057
	hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211G);
8058
	if (!hw_mode)
8059
		hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211B);
8060 8061 8062 8063 8064 8065 8066 8067 8068 8069 8070 8071 8072 8073 8074 8075 8076 8077 8078 8079 8080 8081 8082 8083 8084 8085
	if (hw_mode) {
		channels = hw_mode->channels;
		count = hw_mode->num_channels;
	}

	len +=
	    sprintf(&buf[len],
		    "Displaying %d channels in 2.4GHz band "
		    "(802.11bg):\n", count);

	for (i = 0; i < count; i++)
		len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
			       channels[i].chan,
			       channels[i].power_level,
			       channels[i].
			       flag & IEEE80211_CHAN_W_RADAR_DETECT ?
			       " (IEEE 802.11h required)" : "",
			       (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
				|| (channels[i].
				    flag &
				    IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
			       ", IBSS",
			       channels[i].
			       flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
			       "active/passive" : "passive only");

8086
	hw_mode = iwl3945_get_hw_mode(priv, MODE_IEEE80211A);
8087 8088 8089 8090 8091 8092 8093 8094 8095 8096 8097 8098 8099 8100 8101 8102 8103 8104 8105 8106 8107 8108 8109 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 8120 8121
	if (hw_mode) {
		channels = hw_mode->channels;
		count = hw_mode->num_channels;
	} else {
		channels = NULL;
		count = 0;
	}

	len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
		       "(802.11a):\n", count);

	for (i = 0; i < count; i++)
		len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
			       channels[i].chan,
			       channels[i].power_level,
			       channels[i].
			       flag & IEEE80211_CHAN_W_RADAR_DETECT ?
			       " (IEEE 802.11h required)" : "",
			       (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
				|| (channels[i].
				    flag &
				    IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
			       ", IBSS",
			       channels[i].
			       flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
			       "active/passive" : "passive only");

	return len;
}

static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);

static ssize_t show_statistics(struct device *d,
			       struct device_attribute *attr, char *buf)
{
8122 8123
	struct iwl3945_priv *priv = dev_get_drvdata(d);
	u32 size = sizeof(struct iwl3945_notif_statistics);
8124 8125 8126 8127
	u32 len = 0, ofs = 0;
	u8 *data = (u8 *) & priv->statistics;
	int rc = 0;

8128
	if (!iwl3945_is_alive(priv))
8129 8130 8131
		return -EAGAIN;

	mutex_lock(&priv->mutex);
8132
	rc = iwl3945_send_statistics_request(priv);
8133 8134 8135 8136 8137 8138 8139 8140 8141 8142 8143 8144 8145 8146 8147 8148 8149 8150 8151 8152 8153 8154 8155 8156 8157 8158 8159
	mutex_unlock(&priv->mutex);

	if (rc) {
		len = sprintf(buf,
			      "Error sending statistics request: 0x%08X\n", rc);
		return len;
	}

	while (size && (PAGE_SIZE - len)) {
		hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
				   PAGE_SIZE - len, 1);
		len = strlen(buf);
		if (PAGE_SIZE - len)
			buf[len++] = '\n';

		ofs += 16;
		size -= min(size, 16U);
	}

	return len;
}

static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);

static ssize_t show_antenna(struct device *d,
			    struct device_attribute *attr, char *buf)
{
8160
	struct iwl3945_priv *priv = dev_get_drvdata(d);
8161

8162
	if (!iwl3945_is_alive(priv))
8163 8164 8165 8166 8167 8168 8169 8170 8171 8172
		return -EAGAIN;

	return sprintf(buf, "%d\n", priv->antenna);
}

static ssize_t store_antenna(struct device *d,
			     struct device_attribute *attr,
			     const char *buf, size_t count)
{
	int ant;
8173
	struct iwl3945_priv *priv = dev_get_drvdata(d);
8174 8175 8176 8177 8178 8179 8180 8181 8182 8183 8184

	if (count == 0)
		return 0;

	if (sscanf(buf, "%1i", &ant) != 1) {
		IWL_DEBUG_INFO("not in hex or decimal form.\n");
		return count;
	}

	if ((ant >= 0) && (ant <= 2)) {
		IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
8185
		priv->antenna = (enum iwl3945_antenna)ant;
8186 8187 8188 8189 8190 8191 8192 8193 8194 8195 8196 8197
	} else
		IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);


	return count;
}

static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);

static ssize_t show_status(struct device *d,
			   struct device_attribute *attr, char *buf)
{
8198 8199
	struct iwl3945_priv *priv = (struct iwl3945_priv *)d->driver_data;
	if (!iwl3945_is_alive(priv))
8200 8201 8202 8203 8204 8205 8206 8207 8208 8209 8210 8211 8212
		return -EAGAIN;
	return sprintf(buf, "0x%08x\n", (int)priv->status);
}

static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);

static ssize_t dump_error_log(struct device *d,
			      struct device_attribute *attr,
			      const char *buf, size_t count)
{
	char *p = (char *)buf;

	if (p[0] == '1')
8213
		iwl3945_dump_nic_error_log((struct iwl3945_priv *)d->driver_data);
8214 8215 8216 8217 8218 8219 8220 8221 8222 8223 8224 8225 8226

	return strnlen(buf, count);
}

static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);

static ssize_t dump_event_log(struct device *d,
			      struct device_attribute *attr,
			      const char *buf, size_t count)
{
	char *p = (char *)buf;

	if (p[0] == '1')
8227
		iwl3945_dump_nic_event_log((struct iwl3945_priv *)d->driver_data);
8228 8229 8230 8231 8232 8233 8234 8235 8236 8237 8238 8239

	return strnlen(buf, count);
}

static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);

/*****************************************************************************
 *
 * driver setup and teardown
 *
 *****************************************************************************/

8240
static void iwl3945_setup_deferred_work(struct iwl3945_priv *priv)
8241 8242 8243 8244 8245
{
	priv->workqueue = create_workqueue(DRV_NAME);

	init_waitqueue_head(&priv->wait_command_queue);

8246 8247 8248 8249 8250 8251 8252 8253 8254 8255 8256 8257 8258 8259
	INIT_WORK(&priv->up, iwl3945_bg_up);
	INIT_WORK(&priv->restart, iwl3945_bg_restart);
	INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
	INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
	INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
	INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
	INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
	INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
	INIT_DELAYED_WORK(&priv->post_associate, iwl3945_bg_post_associate);
	INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
	INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
	INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);

	iwl3945_hw_setup_deferred_work(priv);
8260 8261

	tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
8262
		     iwl3945_irq_tasklet, (unsigned long)priv);
8263 8264
}

8265
static void iwl3945_cancel_deferred_work(struct iwl3945_priv *priv)
8266
{
8267
	iwl3945_hw_cancel_deferred_work(priv);
8268

8269
	cancel_delayed_work_sync(&priv->init_alive_start);
8270 8271 8272 8273 8274 8275
	cancel_delayed_work(&priv->scan_check);
	cancel_delayed_work(&priv->alive_start);
	cancel_delayed_work(&priv->post_associate);
	cancel_work_sync(&priv->beacon_update);
}

8276
static struct attribute *iwl3945_sysfs_entries[] = {
8277 8278 8279 8280 8281 8282
	&dev_attr_antenna.attr,
	&dev_attr_channels.attr,
	&dev_attr_dump_errors.attr,
	&dev_attr_dump_events.attr,
	&dev_attr_flags.attr,
	&dev_attr_filter_flags.attr,
8283
#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
8284 8285 8286 8287 8288 8289 8290 8291 8292 8293 8294 8295 8296 8297 8298 8299
	&dev_attr_measurement.attr,
#endif
	&dev_attr_power_level.attr,
	&dev_attr_rate.attr,
	&dev_attr_retry_rate.attr,
	&dev_attr_rf_kill.attr,
	&dev_attr_rs_window.attr,
	&dev_attr_statistics.attr,
	&dev_attr_status.attr,
	&dev_attr_temperature.attr,
	&dev_attr_tune.attr,
	&dev_attr_tx_power.attr,

	NULL
};

8300
static struct attribute_group iwl3945_attribute_group = {
8301
	.name = NULL,		/* put in device directory */
8302
	.attrs = iwl3945_sysfs_entries,
8303 8304
};

8305 8306 8307 8308 8309 8310 8311 8312 8313 8314 8315 8316 8317 8318 8319 8320 8321
static struct ieee80211_ops iwl3945_hw_ops = {
	.tx = iwl3945_mac_tx,
	.start = iwl3945_mac_start,
	.stop = iwl3945_mac_stop,
	.add_interface = iwl3945_mac_add_interface,
	.remove_interface = iwl3945_mac_remove_interface,
	.config = iwl3945_mac_config,
	.config_interface = iwl3945_mac_config_interface,
	.configure_filter = iwl3945_configure_filter,
	.set_key = iwl3945_mac_set_key,
	.get_stats = iwl3945_mac_get_stats,
	.get_tx_stats = iwl3945_mac_get_tx_stats,
	.conf_tx = iwl3945_mac_conf_tx,
	.get_tsf = iwl3945_mac_get_tsf,
	.reset_tsf = iwl3945_mac_reset_tsf,
	.beacon_update = iwl3945_mac_beacon_update,
	.hw_scan = iwl3945_mac_hw_scan
8322 8323
};

8324
static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8325 8326 8327
{
	int err = 0;
	u32 pci_id;
8328
	struct iwl3945_priv *priv;
8329 8330 8331
	struct ieee80211_hw *hw;
	int i;

8332
	if (iwl3945_param_disable_hw_scan) {
8333
		IWL_DEBUG_INFO("Disabling hw_scan\n");
8334
		iwl3945_hw_ops.hw_scan = NULL;
8335 8336
	}

8337 8338
	if ((iwl3945_param_queues_num > IWL_MAX_NUM_QUEUES) ||
	    (iwl3945_param_queues_num < IWL_MIN_NUM_QUEUES)) {
8339 8340 8341 8342 8343 8344 8345 8346
		IWL_ERROR("invalid queues_num, should be between %d and %d\n",
			  IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
		err = -EINVAL;
		goto out;
	}

	/* mac80211 allocates memory for this device instance, including
	 *   space for this driver's private structure */
8347
	hw = ieee80211_alloc_hw(sizeof(struct iwl3945_priv), &iwl3945_hw_ops);
8348 8349 8350 8351 8352 8353 8354
	if (hw == NULL) {
		IWL_ERROR("Can not allocate network device\n");
		err = -ENOMEM;
		goto out;
	}
	SET_IEEE80211_DEV(hw, &pdev->dev);

8355 8356
	hw->rate_control_algorithm = "iwl-3945-rs";

8357 8358 8359 8360 8361
	IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
	priv = hw->priv;
	priv->hw = hw;

	priv->pci_dev = pdev;
8362
	priv->antenna = (enum iwl3945_antenna)iwl3945_param_antenna;
8363
#ifdef CONFIG_IWL3945_DEBUG
8364
	iwl3945_debug_level = iwl3945_param_debug;
8365 8366 8367 8368 8369 8370 8371 8372 8373 8374 8375 8376 8377 8378 8379 8380 8381 8382 8383 8384 8385 8386 8387 8388 8389 8390 8391 8392 8393 8394 8395 8396 8397 8398 8399 8400 8401 8402
	atomic_set(&priv->restrict_refcnt, 0);
#endif
	priv->retry_rate = 1;

	priv->ibss_beacon = NULL;

	/* Tell mac80211 and its clients (e.g. Wireless Extensions)
	 *   the range of signal quality values that we'll provide.
	 * Negative values for level/noise indicate that we'll provide dBm.
	 * For WE, at least, non-0 values here *enable* display of values
	 *   in app (iwconfig). */
	hw->max_rssi = -20;	/* signal level, negative indicates dBm */
	hw->max_noise = -20;	/* noise level, negative indicates dBm */
	hw->max_signal = 100;	/* link quality indication (%) */

	/* Tell mac80211 our Tx characteristics */
	hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;

	hw->queues = 4;

	spin_lock_init(&priv->lock);
	spin_lock_init(&priv->power_data.lock);
	spin_lock_init(&priv->sta_lock);
	spin_lock_init(&priv->hcmd_lock);

	for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
		INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);

	INIT_LIST_HEAD(&priv->free_frames);

	mutex_init(&priv->mutex);
	if (pci_enable_device(pdev)) {
		err = -ENODEV;
		goto out_ieee80211_free_hw;
	}

	pci_set_master(pdev);

8403
	iwl3945_clear_stations_table(priv);
8404 8405 8406 8407 8408 8409 8410 8411 8412 8413 8414 8415 8416 8417 8418 8419 8420 8421 8422 8423 8424 8425 8426 8427 8428 8429 8430 8431 8432 8433 8434 8435 8436

	priv->data_retry_limit = -1;
	priv->ieee_channels = NULL;
	priv->ieee_rates = NULL;
	priv->phymode = -1;

	err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
	if (!err)
		err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
	if (err) {
		printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
		goto out_pci_disable_device;
	}

	pci_set_drvdata(pdev, priv);
	err = pci_request_regions(pdev, DRV_NAME);
	if (err)
		goto out_pci_disable_device;
	/* We disable the RETRY_TIMEOUT register (0x41) to keep
	 * PCI Tx retries from interfering with C3 CPU state */
	pci_write_config_byte(pdev, 0x41, 0x00);
	priv->hw_base = pci_iomap(pdev, 0, 0);
	if (!priv->hw_base) {
		err = -ENODEV;
		goto out_pci_release_regions;
	}

	IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
			(unsigned long long) pci_resource_len(pdev, 0));
	IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);

	/* Initialize module parameter values here */

8437
	if (iwl3945_param_disable) {
8438 8439 8440 8441 8442 8443 8444 8445 8446 8447 8448 8449 8450 8451 8452 8453 8454 8455 8456 8457 8458 8459 8460 8461 8462 8463 8464 8465 8466 8467 8468 8469 8470 8471
		set_bit(STATUS_RF_KILL_SW, &priv->status);
		IWL_DEBUG_INFO("Radio disabled.\n");
	}

	priv->iw_mode = IEEE80211_IF_TYPE_STA;

	pci_id =
	    (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;

	switch (pci_id) {
	case 0x42221005:	/* 0x4222 0x8086 0x1005 is BG SKU */
	case 0x42221034:	/* 0x4222 0x8086 0x1034 is BG SKU */
	case 0x42271014:	/* 0x4227 0x8086 0x1014 is BG SKU */
	case 0x42221044:	/* 0x4222 0x8086 0x1044 is BG SKU */
		priv->is_abg = 0;
		break;

	/*
	 * Rest are assumed ABG SKU -- if this is not the
	 * case then the card will get the wrong 'Detected'
	 * line in the kernel log however the code that
	 * initializes the GEO table will detect no A-band
	 * channels and remove the is_abg mask.
	 */
	default:
		priv->is_abg = 1;
		break;
	}

	printk(KERN_INFO DRV_NAME
	       ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
	       priv->is_abg ? "A" : "");

	/* Device-specific setup */
8472
	if (iwl3945_hw_set_hw_setting(priv)) {
8473 8474 8475 8476 8477
		IWL_ERROR("failed to set hw settings\n");
		mutex_unlock(&priv->mutex);
		goto out_iounmap;
	}

8478
#ifdef CONFIG_IWL3945_QOS
8479
	if (iwl3945_param_qos_enable)
8480 8481
		priv->qos_data.qos_enable = 1;

8482
	iwl3945_reset_qos(priv);
8483 8484 8485

	priv->qos_data.qos_active = 0;
	priv->qos_data.qos_cap.val = 0;
8486
#endif /* CONFIG_IWL3945_QOS */
8487

8488 8489 8490
	iwl3945_set_rxon_channel(priv, MODE_IEEE80211G, 6);
	iwl3945_setup_deferred_work(priv);
	iwl3945_setup_rx_handlers(priv);
8491 8492 8493 8494 8495 8496

	priv->rates_mask = IWL_RATES_MASK;
	/* If power management is turned on, default to AC mode */
	priv->power_mode = IWL_POWER_AC;
	priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;

8497
	iwl3945_disable_interrupts(priv);
8498

8499 8500
	pci_enable_msi(pdev);

8501
	err = request_irq(pdev->irq, iwl3945_isr, IRQF_SHARED, DRV_NAME, priv);
8502 8503 8504 8505 8506 8507 8508
	if (err) {
		IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
		goto out_disable_msi;
	}

	mutex_lock(&priv->mutex);

8509
	err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8510 8511 8512 8513 8514 8515 8516 8517
	if (err) {
		IWL_ERROR("failed to create sysfs device attributes\n");
		mutex_unlock(&priv->mutex);
		goto out_release_irq;
	}

	/* fetch ucode file from disk, alloc and copy to bus-master buffers ...
	 * ucode filename and max sizes are card-specific. */
8518
	err = iwl3945_read_ucode(priv);
8519 8520 8521 8522 8523 8524 8525 8526
	if (err) {
		IWL_ERROR("Could not read microcode: %d\n", err);
		mutex_unlock(&priv->mutex);
		goto out_pci_alloc;
	}

	mutex_unlock(&priv->mutex);

8527
	IWL_DEBUG_INFO("Queueing UP work.\n");
8528 8529 8530 8531 8532 8533

	queue_work(priv->workqueue, &priv->up);

	return 0;

 out_pci_alloc:
8534
	iwl3945_dealloc_ucode_pci(priv);
8535

8536
	sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8537 8538 8539 8540 8541 8542 8543 8544

 out_release_irq:
	free_irq(pdev->irq, priv);

 out_disable_msi:
	pci_disable_msi(pdev);
	destroy_workqueue(priv->workqueue);
	priv->workqueue = NULL;
8545
	iwl3945_unset_hw_setting(priv);
8546 8547 8548 8549 8550 8551 8552 8553 8554 8555 8556 8557 8558 8559

 out_iounmap:
	pci_iounmap(pdev, priv->hw_base);
 out_pci_release_regions:
	pci_release_regions(pdev);
 out_pci_disable_device:
	pci_disable_device(pdev);
	pci_set_drvdata(pdev, NULL);
 out_ieee80211_free_hw:
	ieee80211_free_hw(priv->hw);
 out:
	return err;
}

8560
static void iwl3945_pci_remove(struct pci_dev *pdev)
8561
{
8562
	struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8563 8564 8565 8566 8567 8568 8569 8570 8571
	struct list_head *p, *q;
	int i;

	if (!priv)
		return;

	IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");

	set_bit(STATUS_EXIT_PENDING, &priv->status);
8572

8573
	iwl3945_down(priv);
8574 8575 8576 8577 8578

	/* Free MAC hash list for ADHOC */
	for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
		list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
			list_del(p);
8579
			kfree(list_entry(p, struct iwl3945_ibss_seq, list));
8580 8581 8582
		}
	}

8583
	sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
8584

8585
	iwl3945_dealloc_ucode_pci(priv);
8586 8587

	if (priv->rxq.bd)
8588 8589
		iwl3945_rx_queue_free(priv, &priv->rxq);
	iwl3945_hw_txq_ctx_free(priv);
8590

8591 8592
	iwl3945_unset_hw_setting(priv);
	iwl3945_clear_stations_table(priv);
8593 8594 8595

	if (priv->mac80211_registered) {
		ieee80211_unregister_hw(priv->hw);
8596
		iwl3945_rate_control_unregister(priv->hw);
8597 8598
	}

8599 8600 8601
	/*netif_stop_queue(dev); */
	flush_workqueue(priv->workqueue);

8602
	/* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
8603 8604 8605 8606 8607 8608 8609 8610 8611 8612 8613 8614 8615 8616 8617 8618 8619 8620 8621 8622 8623 8624 8625 8626 8627
	 * priv->workqueue... so we can't take down the workqueue
	 * until now... */
	destroy_workqueue(priv->workqueue);
	priv->workqueue = NULL;

	free_irq(pdev->irq, priv);
	pci_disable_msi(pdev);
	pci_iounmap(pdev, priv->hw_base);
	pci_release_regions(pdev);
	pci_disable_device(pdev);
	pci_set_drvdata(pdev, NULL);

	kfree(priv->channel_info);

	kfree(priv->ieee_channels);
	kfree(priv->ieee_rates);

	if (priv->ibss_beacon)
		dev_kfree_skb(priv->ibss_beacon);

	ieee80211_free_hw(priv->hw);
}

#ifdef CONFIG_PM

8628
static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
8629
{
8630
	struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8631 8632 8633 8634

	set_bit(STATUS_IN_SUSPEND, &priv->status);

	/* Take down the device; powers it off, etc. */
8635
	iwl3945_down(priv);
8636 8637 8638 8639 8640 8641 8642 8643 8644 8645 8646

	if (priv->mac80211_registered)
		ieee80211_stop_queues(priv->hw);

	pci_save_state(pdev);
	pci_disable_device(pdev);
	pci_set_power_state(pdev, PCI_D3hot);

	return 0;
}

8647
static void iwl3945_resume(struct iwl3945_priv *priv)
8648 8649 8650 8651 8652 8653 8654 8655
{
	unsigned long flags;

	/* The following it a temporary work around due to the
	 * suspend / resume not fully initializing the NIC correctly.
	 * Without all of the following, resume will not attempt to take
	 * down the NIC (it shouldn't really need to) and will just try
	 * and bring the NIC back up.  However that fails during the
8656 8657
	 * ucode verification process.  This then causes iwl3945_down to be
	 * called *after* iwl3945_hw_nic_init() has succeeded -- which
8658 8659 8660
	 * then lets the next init sequence succeed.  So, we've
	 * replicated all of that NIC init code here... */

8661
	iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
8662

8663
	iwl3945_hw_nic_init(priv);
8664

8665 8666
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR,
8667
		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
8668 8669 8670
	iwl3945_write32(priv, CSR_INT, 0xFFFFFFFF);
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
	iwl3945_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
8671 8672

	/* tell the device to stop sending interrupts */
8673
	iwl3945_disable_interrupts(priv);
8674 8675

	spin_lock_irqsave(&priv->lock, flags);
8676
	iwl3945_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
8677

8678 8679
	if (!iwl3945_grab_nic_access(priv)) {
		iwl3945_write_prph(priv, APMG_CLK_DIS_REG,
8680
					 APMG_CLK_VAL_DMA_CLK_RQT);
8681
		iwl3945_release_nic_access(priv);
8682 8683 8684 8685 8686
	}
	spin_unlock_irqrestore(&priv->lock, flags);

	udelay(5);

8687
	iwl3945_hw_nic_reset(priv);
8688 8689 8690 8691 8692 8693

	/* Bring the device back up */
	clear_bit(STATUS_IN_SUSPEND, &priv->status);
	queue_work(priv->workqueue, &priv->up);
}

8694
static int iwl3945_pci_resume(struct pci_dev *pdev)
8695
{
8696
	struct iwl3945_priv *priv = pci_get_drvdata(pdev);
8697 8698 8699 8700 8701 8702 8703 8704 8705 8706 8707 8708 8709 8710 8711 8712
	int err;

	printk(KERN_INFO "Coming out of suspend...\n");

	pci_set_power_state(pdev, PCI_D0);
	err = pci_enable_device(pdev);
	pci_restore_state(pdev);

	/*
	 * Suspend/Resume resets the PCI configuration space, so we have to
	 * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
	 * from interfering with C3 CPU state. pci_restore_state won't help
	 * here since it only restores the first 64 bytes pci config header.
	 */
	pci_write_config_byte(pdev, 0x41, 0x00);

8713
	iwl3945_resume(priv);
8714 8715 8716 8717 8718 8719 8720 8721 8722 8723 8724 8725

	return 0;
}

#endif /* CONFIG_PM */

/*****************************************************************************
 *
 * driver and module entry point
 *
 *****************************************************************************/

8726
static struct pci_driver iwl3945_driver = {
8727
	.name = DRV_NAME,
8728 8729 8730
	.id_table = iwl3945_hw_card_ids,
	.probe = iwl3945_pci_probe,
	.remove = __devexit_p(iwl3945_pci_remove),
8731
#ifdef CONFIG_PM
8732 8733
	.suspend = iwl3945_pci_suspend,
	.resume = iwl3945_pci_resume,
8734 8735 8736
#endif
};

8737
static int __init iwl3945_init(void)
8738 8739 8740 8741 8742
{

	int ret;
	printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
	printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
8743
	ret = pci_register_driver(&iwl3945_driver);
8744 8745 8746 8747
	if (ret) {
		IWL_ERROR("Unable to initialize PCI module\n");
		return ret;
	}
8748
#ifdef CONFIG_IWL3945_DEBUG
8749
	ret = driver_create_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8750 8751
	if (ret) {
		IWL_ERROR("Unable to create driver sysfs file\n");
8752
		pci_unregister_driver(&iwl3945_driver);
8753 8754 8755 8756 8757 8758 8759
		return ret;
	}
#endif

	return ret;
}

8760
static void __exit iwl3945_exit(void)
8761
{
8762
#ifdef CONFIG_IWL3945_DEBUG
8763
	driver_remove_file(&iwl3945_driver.driver, &driver_attr_debug_level);
8764
#endif
8765
	pci_unregister_driver(&iwl3945_driver);
8766 8767
}

8768
module_param_named(antenna, iwl3945_param_antenna, int, 0444);
8769
MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
8770
module_param_named(disable, iwl3945_param_disable, int, 0444);
8771
MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
8772
module_param_named(hwcrypto, iwl3945_param_hwcrypto, int, 0444);
8773 8774
MODULE_PARM_DESC(hwcrypto,
		 "using hardware crypto engine (default 0 [software])\n");
8775
module_param_named(debug, iwl3945_param_debug, int, 0444);
8776
MODULE_PARM_DESC(debug, "debug output mask");
8777
module_param_named(disable_hw_scan, iwl3945_param_disable_hw_scan, int, 0444);
8778 8779
MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");

8780
module_param_named(queues_num, iwl3945_param_queues_num, int, 0444);
8781 8782 8783
MODULE_PARM_DESC(queues_num, "number of hw queues.");

/* QoS */
8784
module_param_named(qos_enable, iwl3945_param_qos_enable, int, 0444);
8785 8786
MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");

8787 8788
module_exit(iwl3945_exit);
module_init(iwl3945_init);