• Angus Clark's avatar
    mtd: st_spi_fsm: Update Macronix 32-bit addressing support · 009e7e61
    Angus Clark authored
    Support for the Macronix 32-bit addressing scheme was originally developed using
    the MX25L25635E device.  As is often the case, it was found that the presence of
    a "WAIT" instruction was required for the "EN4B/EX4B" FSM Sequence to complete.
    (It is known that the SPI FSM Controller makes certain undocumented assumptions
    regarding what constitutes a valid sequence.)  However, further testing
    suggested that a small delay was required after issuing the "EX4B" command;
    without this delay, data corruptions were observed, consistent with the device
    not being ready to retrieve data.  Although the issue was not fully understood,
    the workaround of adding a small delay was implemented, while awaiting
    clarification from Macronix.
    
    The same behaviour has now been found with a second Macronix device, the
    MX25L25655E.  However, with this device, it seems that the delay is also
    required after the 'EN4B' commands.  This discovery has prompted us to revisit
    the issue.
    
    Although still not conclusive, further tests have suggested that the issue is
    down to the SPI FSM Controller, rather than the Macronix devices.  Furthermore,
    an alternative workaround has emerged which is to set the WAIT time to
    0x00000001, rather then 0x00000000.  (Note, the WAIT instruction is used purely
    for the purpose of achieving "sequence validity", rather than actually
    implementing a delay!)
    
    The issue is now being investigated by the Design and Validation teams.  In the
    meantime, we implement the alternative workaround, which reduces the effective
    delay from 1us to 1ns.
    Signed-off-by: default avatarAngus Clark <angus.clark@st.com>
    Signed-off-by: default avatarLee Jones <lee.jones@linaro.org>
    Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
    009e7e61
st_spi_fsm.c 56 KB