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Thor Thayer authored
Add the device tree entries and bindings needed to support the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon an earlier patch to declare and setup On-chip RAM properly: 8b907c8b ("arm: dts: socfpga: Add OCRAM node") Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Acked-by: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: galak@codeaurora.org Cc: grant.likely@linaro.org Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: ijc+devicetree@hellion.org.uk Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux@arm.linux.org.uk Cc: linux-doc@vger.kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: m.chehab@samsung.com Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Russell King <linux@arm.linux.org.uk> Link: http://lkml.kernel.org/r/1455132384-17108-2-git-send-email-tthayer@opensource.altera.comSigned-off-by: Borislav Petkov <bp@suse.de>
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