• Ville Syrjälä's avatar
    drm/i915: Fix wm latency==0 disable on skl+ · 0aded171
    Ville Syrjälä authored
    When adding the early latency==0 check back I neglected to
    realize that we no longer have a way to return a failure
    from the wm computation like we had in the past (since we
    now calculate wms before ddb allocations). Also plane_en
    being false doesn't actually indicate that the level is
    invalid as it wil also happen when the plane is not
    enabled.
    
    skl_allocate_pipe_ddb() starts scanning from the maximum
    watermark level and it stops as soon as it finds a level
    that is deemed viable. The assumption being that if level
    n+1 is valid then level n is valid as well. Thus if we
    now disable any watermark level by zeroing its latency
    the code will think that level to be actually valid
    and won't confirm whether the actually enabled lower
    watermark level(s) actually fit into the allotted ddb
    space. This results in hilarious watermark values that
    exceed the ddb allocation of the plane.
    
    The way we must now indicate a failure is to assign an
    unreasoanbly big value to min_ddb_alloc which will then
    make skl_allocate_pipe_ddb() reject the entire level.
    
    v2: Also do the same for the lines>31 case (Matt)
    v3: Make 'blocks' u32 (Matt)
    
    Cc: Matt Roper <matthew.d.roper@intel.com>
    Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
    Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190205155053.10081-1-ville.syrjala@linux.intel.com
    0aded171
intel_pm.c 281 KB