• Masahiro Yamada's avatar
    mmc: sdhci-cadence: enable v4_mode to fix ADMA 64-bit addressing · e73a3896
    Masahiro Yamada authored
    The IP datasheet says this controller is compatible with SD Host
    Specification Version v4.00.
    
    As it turned out, the ADMA of this IP does not work with 64-bit mode
    when it is in the Version 3.00 compatible mode; it understands the
    old 64-bit descriptor table (as defined in SDHCI v2), but the ADMA
    System Address Register (SDHCI_ADMA_ADDRESS) cannot point to the
    64-bit address.
    
    I noticed this issue only after commit bd2e7563 ("dma-contiguous:
    use fallback alloc_pages for single pages"). Prior to that commit,
    dma_set_mask_and_coherent() returned the dma address that fits in
    32-bit range, at least for the default arm64 configuration
    (arch/arm64/configs/defconfig). Now the host->adma_addr exceeds the
    32-bit limit, causing the real problem for the Socionext SoCs.
    (As a side-note, I was also able to reproduce the issue for older
    kernels by turning off CONFIG_DMA_CMA.)
    
    Call sdhci_enable_v4_mode() to fix this.
    
    Cc: <stable@vger.kernel.org> # v4.20+
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
    e73a3896
sdhci-cadence.c 11.4 KB