• Tero Kristo's avatar
    clk: ti: amx3xx: limit the maximum frequency of DPLLs based on spec · 3db5ca27
    Tero Kristo authored
    AM33xx/AM43xx devices use the same DPLL IP blocks, which only support
    maximum rate of 1GHz [1] for the default and 2GHz for the low-jitter type
    DPLLs [2]. Reflect this limitation in the DPLL init code by adding the
    max-rate parameter based on the DPLL types.
    
    [1] Functional, integration & test specification for GS70 ADPLLS, Rev 1.0-01
    [2] Functional, integration & test specification for GS70 ADPLLLJ, Rev 0.8-02
    Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
    Cc: Nishanth Menon <nm@ti.com>
    Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
    Cc: Lokesh Vutla <lokeshvutla@ti.com>
    Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
    3db5ca27
dpll.c 20.2 KB