Without this, the PMC continually detects an interrupt when the PMU_IRQ
line is high, causing the tps6686x IRQ handler thread to hog an entire
CPU.

This change was originally written by Wei Ni <wni@nvidia.com> for Seaboard
in the ChromeOS kernel.

Long-term, this should probably be moved into some kind of PMU driver,
or perhaps integrated into the GPIO/IRQ/pinmux system?
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>