The hack I put in a couple of years ago to avoid clock stretching issues
when talking to the xc5000 worked fine for writes, but intermittently
fails for register reads, because the xc5000 may stretch the clock for
longer between bytes (I was seeing cases of 21 us on the analyzer).

The problem manifested itself as the xc5000 firmware version and PLL
lock register intermittently showing garbage values.

Slow down the i2c bus from 30 KHz to 20 KHz to accommodate.
Signed-off-by: Devin Heitmueller <dheitmueller@kernellabs.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>