• Daniel Vetter's avatar
    drm/i915: fixup in-line clflushing on bit17 swizzled bos · 23c18c71
    Daniel Vetter authored
    The issue is that with inline clflushing the clflushing isn't properly
    swizzled. Fix this by
    - always clflushing entire 128 byte chunks and
    - unconditionally flush before writes when swizzling a given page.
      We could be clever and check whether we pwrite a partial 128 byte
      chunk instead of a partial cacheline, but I've figured that's not
      worth it.
    
    Now the usual approach is to fold this into the original patch series, but
    I've opted against this because
    - this fixes a corner case only very old userspace relies on and
    - I'd like to not invalidate all the testing the pwrite rewrite has gotten.
    
    This fixes the regression notice by tests/gem_tiled_partial_prite_pread
    from i-g-t. Unfortunately it doesn't fix the issues with partial pwrites to
    tiled buffers on bit17 swizzling machines. But that is also broken without
    the pwrite patches, so likely a different issue (or a problem with the
    testcase).
    
    v2: Simplify the patch by dropping the overly clever partial write
    logic for swizzled pages.
    Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Signed-Off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    23c18c71
i915_gem.c 102 KB