• Stephen Warren's avatar
    ARM: dt: tegra: paz00: add regulators · 217b8f0f
    Stephen Warren authored
    The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
    
    Three data sources were used for the data encoded here:
    * The HW defaults, as extracted from real HW.
    * The schematic, which specifies a voltage for each rail in the signal
      names.
    * The AC100 kernel used by the Ubuntu port:
    
      repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
      branch chromeos-ac100-3.0
      file arch/arm/mach-tegra/board-paz00-power.c
    
      For many rails, the constraints in that tree specified differing min
      and max voltages. In all cases, the min value was ignored, since
      there's no need currently to vary any of the voltages at run-time.
      DVFS might change this in the future.
    
    In most cases these sources all matched. Differences are:
    
    sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
    of 1.3v, but this higher voltage was only applied to HW by DVFS code,
    which isn't currently supported in mainline.
    
    sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
    of 1.125v, but this higher voltage was only applied to HW by DVFS code,
    which isn't currently supported in mainline.
    
    ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
    but since the board wasn't marked as having fully constrained regulators,
    the rail was not turned off, so the difference had no effect. The rail
    is needed for USB.
    
    ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
    since this regulator is used for the same purpose as on other boards that
    require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
    VDAC on Tegra, and so in practice is unlikely to be used, even though it
    is actaully hooked up in HW.
    
    Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
    Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
    Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
    Acked-by: default avatarLaxman Dewangan <ldewangan@nvidia.com>
    217b8f0f
tegra20-paz00.dts 11.2 KB