• Jeff Garzik's avatar
    [ia32] cpu capabilities cleanups and additions · e696dce2
    Jeff Garzik authored
    * Add support for new Centaur(VIA) and Intel cpuid feature bits,
      expanding the x86_capability array by two.
    * (cleanup) Move cpu setup for newer Via C3 cpus into its own
      function, init_c3()
    * Add support for RNG control msr on VIA Nehemiah
    * export X86_FEATURE_XSTORE and cpu_has_xstore macros so that
      kernel code may easily test for cpu support of the new
      "xstore" instruction.
    e696dce2
msr.h 6.77 KB