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Codrin Ciubotariu authored
The on-chip PLL can be disabled if on the MCLKI pin we have an external clock at 512 x fs. This clock can be used as direct internal clock for ADCs or DACs. To support this, we add an extra clock id that can be configured using the set_sysclk() callback. Signed-off-by:
Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Signed-off-by:
Mark Brown <broonie@kernel.org>
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