• Guy Levi's avatar
    IB/mlx5: Add UARs write-combining and non-cached mapping · 37aa5c36
    Guy Levi authored
    By this patch, the user space library will be able to improve
    performance using appropriate ringing DoorBell method according to the
    memory type it asked for.
    
    Currently only one mapping command is allowed for UARs:
    MLX5_IB_MMAP_REGULAR_PAGE. Using this mapping, the kernel maps the
    UARs to write-combining (WC) if the system supports it.
    If the system is not supporting WC the UARs are mapped to
    non-cached(NC). In this case the user space library can't tell which
    mapping is applied.
    This patch adds 2 new mapping commands: MLX5_IB_MMAP_WC_PAGE and
    MLX5_IB_MMAP_NC_PAGE. For these commands the kernel maps exactly as
    requested and fails if it can't.
    
    Since there is no generic way to check if the requested memory region
    can be mapped as WC, driver enables conclusive WC mapping only for
    x86, PowerPC and ARM which support WC for the device's memory region.
    Signed-off-by: default avatarGuy Levy <guyle@mellanox.com>
    Signed-off-by: default avatarMoshe Lazer <moshel@mellanox.com>
    Signed-off-by: default avatarMatan Barak <matanb@mellanox.com>
    Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
    37aa5c36
mlx5_ib.h 24.6 KB