• Arnd Bergmann's avatar
    crypto: ux500 - make interrupt mode plausible · e1f8859e
    Arnd Bergmann authored
    The interrupt handler in the ux500 crypto driver has an obviously
    incorrect way to access the data buffer, which for a while has
    caused this build warning:
    
    ../ux500/cryp/cryp_core.c: In function 'cryp_interrupt_handler':
    ../ux500/cryp/cryp_core.c:234:5: warning: passing argument 1 of '__fswab32' makes integer from pointer without a cast [enabled by default]
         writel_relaxed(ctx->indata,
         ^
    In file included from ../include/linux/swab.h:4:0,
                     from ../include/uapi/linux/byteorder/big_endian.h:12,
                     from ../include/linux/byteorder/big_endian.h:4,
                     from ../arch/arm/include/uapi/asm/byteorder.h:19,
                     from ../include/asm-generic/bitops/le.h:5,
                     from ../arch/arm/include/asm/bitops.h:340,
                     from ../include/linux/bitops.h:33,
                     from ../include/linux/kernel.h:10,
                     from ../include/linux/clk.h:16,
                     from ../drivers/crypto/ux500/cryp/cryp_core.c:12:
    ../include/uapi/linux/swab.h:57:119: note: expected '__u32' but argument is of type 'const u8 *'
     static inline __attribute_const__ __u32 __fswab32(__u32 val)
    
    There are at least two, possibly three problems here:
    a) when writing into the FIFO, we copy the pointer rather than the
       actual data we want to give to the hardware
    b) the data pointer is an array of 8-bit values, while the FIFO
       is 32-bit wide, so both the read and write access fail to do
       a proper type conversion
    c) This seems incorrect for big-endian kernels, on which we need to
       byte-swap any register access, but not normally FIFO accesses,
       at least the DMA case doesn't do it either.
    
    This converts the bogus loop to use the same readsl/writesl pair
    that we use for the two other modes (DMA and polling). This is
    more efficient and consistent, and probably correct for endianess.
    
    The bug has existed since the driver was first merged, and was
    probably never detected because nobody tried to use interrupt mode.
    It might make sense to backport this fix to stable kernels, depending
    on how the crypto maintainers feel about that.
    Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
    Cc: linux-crypto@vger.kernel.org
    Cc: Fabio Baltieri <fabio.baltieri@linaro.org>
    Cc: Linus Walleij <linus.walleij@linaro.org>
    Cc: Herbert Xu <herbert@gondor.apana.org.au>
    Cc: "David S. Miller" <davem@davemloft.net>
    Cc: stable@vger.kernel.org
    Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
    e1f8859e
cryp_core.c 44.9 KB