• Ralf Baechle's avatar
    [MIPS] Fix shadow register support. · f6771dbb
    Ralf Baechle authored
    Shadow register support would not possibly have worked on multicore
    systems.  The support code for it was also depending not on MIPS R2 but
    VSMP or SMTC kernels even though it makes perfect sense with UP kernels.
    
    SR sets are a scarce resource and the expected usage pattern is that
    users actually hardcode the register set numbers in their code.  So fix
    the allocator by ditching it.  Move the remaining CPU probe bits into
    the generic CPU probe.
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    f6771dbb
cpu-info.h 2.57 KB