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Christophe Leroy authored
On some hardware, the nCE signal is wired to the ChipSelect associated to bus address of the NAND, so it is automatically driven during the memory access and it is not managed by a GPIO. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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