• David E. Box's avatar
    arch: x86: New MailBox support driver for Intel SOC's · 46184415
    David E. Box authored
    Current Intel SOC cores use a MailBox Interface (MBI) to provide access to
    configuration registers on devices (called units) connected to the system
    fabric. This is a support driver that implements access to this interface on
    those platforms that can enumerate the device using PCI. Initial support is for
    BayTrail, for which port definitons are provided. This is a requirement for
    implementing platform specific features (e.g. RAPL driver requires this to
    perform platform specific power management using the registers in PUNIT).
    Dependant modules should select IOSF_MBI in their respective Kconfig
    configuraiton. Serialized access is handled by all exported routines with
    spinlocks.
    
    The API includes 3 functions for access to unit registers:
    
    int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr)
    int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr)
    int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask)
    
    port:	indicating the unit being accessed
    opcode:	the read or write port specific opcode
    offset:	the register offset within the port
    mdr:	the register data to be read, written, or modified
    mask:	bit locations in mdr to change
    
    Returns nonzero on error
    
    Note: GPU code handles access to the GFX unit. Therefore access to that unit
    with this driver is disallowed to avoid conflicts.
    Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
    Link: http://lkml.kernel.org/r/1389216471-734-1-git-send-email-david.e.box@linux.intel.comSigned-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
    Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
    Cc: Matthew Garrett <mjg59@srcf.ucam.org>
    46184415
iosf_mbi.c 4.99 KB