• Helge Deller's avatar
    parisc: Fix crash due alternative coding for NP iopdir_fdc bit · 527a1d1e
    Helge Deller authored
    According to the found documentation, data cache flushes and sync
    instructions are needed on the PCX-U+ (PA8200, e.g. C200/C240)
    platforms, while PCX-W (PA8500, e.g. C360) platforms aparently don't
    need those flushes when changing the IO PDIR data structures.
    
    We have no documentation for PCX-W+ (PA8600) and PCX-W2 (PA8700) CPUs,
    but Carlo Pisani reported that his C3600 machine (PA8600, PCX-W+) fails
    when the fdc instructions were removed. His firmware didn't set the NIOP
    bit, so one may assume it's a firmware bug since other C3750 machines
    had the bit set.
    
    Even if documentation (as mentioned above) states that PCX-W (PA8500,
    e.g.  J5000) does not need fdc flushes, Sven could show that an Adaptec
    29320A PCI-X SCSI controller reliably failed on a dd command during the
    first five minutes in his J5000 when fdc flushes were missing.
    
    Going forward, we will now NOT replace the fdc and sync assembler
    instructions by NOPS if:
    a) the NP iopdir_fdc bit was set by firmware, or
    b) we find a CPU up to and including a PCX-W+ (PA8600).
    
    This fixes the HPMC crashes on a C240 and C36XX machines. For other
    machines we rely on the firmware to set the bit when needed.
    
    In case one finds HPMC issues, people could try to boot their machines
    with the "no-alternatives" kernel option to turn off any alternative
    patching.
    Reported-by: default avatarSven Schnelle <svens@stackframe.org>
    Reported-by: default avatarCarlo Pisani <carlojpisani@gmail.com>
    Tested-by: default avatarSven Schnelle <svens@stackframe.org>
    Fixes: 3847dab7 ("parisc: Add alternative coding infrastructure")
    Signed-off-by: default avatarHelge Deller <deller@gmx.de>
    Cc: stable@vger.kernel.org # 5.0+
    527a1d1e
alternative.c 2.54 KB