On a new SoC based on DaVinci, there are multiple power
domains similar to that in C6670 (c6x). Currently the
clock module assumes that there are only two power domains
(0 and 1).

This patch removes this restriction to allow porting on to
the new SoC.

Reviewed-by :Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>