This adds a SRAM controller node for the H3, with support for the C1
SRAM region that is shared between the Video Engine and the CPU.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
[Maxime: Fixed the compatible and commit prefix]
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>