• James Hogan's avatar
    MIPS: KVM: Emulate FPU bits in COP0 interface · 6cdc65e3
    James Hogan authored
    Emulate FPU related parts of COP0 interface so that the guest will be
    able to enable/disable the following once the FPU capability has been
    wired up:
    - The FPU (Status.CU1)
    - 64-bit FP register mode (Status.FR)
    - Hybrid FP register mode (Config5.FRE)
    
    Changing Status.CU1 has no immediate effect if the FPU state isn't live,
    as the FPU state is restored lazily on first use. After that, changes
    take place immediately in the host Status.CU1, so that the guest can
    start getting coprocessor unusable exceptions right away for guest FPU
    operations if it is disabled. The FPU state is saved lazily too, as the
    FPU may get re-enabled in the near future anyway.
    
    Any change to Status.FR causes the FPU state to be discarded and FPU
    disabled, as the register state is architecturally UNPREDICTABLE after
    such a change. This should also ensure that the FPU state is fully
    initialised (with stale state, but that's fine) when it is next used in
    the new FP mode.
    
    Any change to the Config5.FRE bit is immediately updated in the host
    state so that the guest can get the relevant exceptions right away for
    single-precision FPU operations.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Cc: Paolo Bonzini <pbonzini@redhat.com>
    Cc: Paul Burton <paul.burton@imgtec.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: Gleb Natapov <gleb@kernel.org>
    Cc: linux-mips@linux-mips.org
    Cc: kvm@vger.kernel.org
    6cdc65e3
emulate.c 65.3 KB